- Timestamp:
- Apr 19, 2013, 11:44:35 AM (12 years ago)
- google:author:
- aitotat@gmail.com
- Location:
- trunk/XTIDE_Universal_BIOS
- Files:
-
- 20 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Inc/BootVars.inc
r528 r545 40 40 .rgbMnuStack: 41 41 .dwPostStack resb 4 ; POST stack pointer when entering INT 19h 42 43 %ifdef MODULE_8BIT_IDE_ADVANCED44 .wNextXTCFportToScan resb 2 ; Needed for XT-CF port autodetection45 %endif46 42 %ifdef MODULE_HOTKEYS 47 43 .hotkeyVars resb HOTKEYVARS_size -
trunk/XTIDE_Universal_BIOS/Inc/Controllers/XTCF.inc
r526 r545 2 2 ; Description : Lo-tech XT-CFv2 board specifications. 3 3 ; 4 ; More information at http://www.lo-tech.co.uk/wiki/Lo-tech_XT-CFv2_Board4 ; More information at http://www.lo-tech.co.uk/XT-CF 5 5 6 6 ; … … 20 20 ; 21 21 22 ; Modified by JJP for XT-CFv3 support, Mar-13 23 24 22 25 %ifndef XTCF_INC 23 26 %define XTCF_INC 24 27 25 DEFAULT_XTCF_SECTOR_WINDOW_SEGMENT EQU 0D800h 26 27 ; XT-CF requires that block must be less than 128 sectors (64 kiB).28 ; Instead of limiting block size to 64, we limit it to 32 (16 kiB).29 ; Transferring more than 16 kiB with 8237 DMA controller block or demand30 ; mode might interfere with DRAM refresh on XT systems.31 XTCF_DMA_MODE_MAX_BLOCK_SIZE EQU 32; Sectors28 ; XT-CF requires that block must be less than 128 sectors (64 kiB) for DMA 29 ; transfers. 30 ; 31 ; Note: XT-CFv3 DMA will not interfere with PC & PC/XT memory refresh, 32 ; since the XT-CFv3 detaches itself from the bus every 16 bytes transferred. 33 ; 34 XTCF_DMA_MODE_MAX_BLOCK_SIZE EQU 64 ; Sectors 32 35 33 36 ; Possible base addresses. Note that all XT-CF IDE registers are SHL 1 compared 34 37 ; to standard IDE registers. 35 XTCF_BASE_PORT_DETECTION_SEED EQU 140h ; Not a valid base address but needed for autodetection36 38 XTCF_BASE_PORT_1 EQU 200h 37 39 XTCF_BASE_PORT_2 EQU 240h … … 41 43 42 44 ; XT-CF Control Register (do not SHL 1 these!) 43 XTCF_CONTROL_REGISTER EQU 1Fh 44 XTCF_CONTROL_REGISTER_INVERTED_in EQU 1Eh 45 ; Note: XT-CFv3 control register is used *only* to raise DRQ. The register cannot be read. 46 ; 47 XTCF_CONTROL_REGISTER EQU 1Eh 45 48 46 ; Control Register contents:49 ; Transfer Mode Constants 47 50 ; 48 ; Control Register holds high byte from Sector Window segment if >= A0h 49 ; (First possible segment for Sector Window is A000h) 51 ; Available transfer modes depend on the controller. All XT-CF controllers 52 ; support 8-bit PIO, either with 8-bit or 16-bit instructions (i.e., data 53 ; can be fetched from the controller with REP INSW or REP INSB since A0 is 54 ; not decoded). However, errors in the implementation of the BIU on some 55 ; machines will prevent 16-bit instructions delivering data correctly. 50 56 ; 51 ; 8-bit PIO transfers (port I/O) are used if Control Register is zero.52 ; Any other value means DMA transfers (using DMA channel 3).53 XTCF_8BIT_PIO_MODE EQU 0 54 XTCF_DMA_MODE EQU 10h 55 XTCF_MEMORY_MAPPED_MODE EQU 0A0h 56 RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER EQU 40h57 58 57 ; For XT-CFv3 adapter, DMA transfers are also supported via channel 3. 58 ; 59 ; XT-CFv3 cannot be distinguised by software, so user must decide and set 60 ; the mode via a call to Int 13h function 1Eh accordingly (see AH1E_XTCF.asm). 61 ;; 62 XTCF_8BIT_PIO_MODE EQU 00h 63 XTCF_8BIT_PIO_MODE_WITH_BIU_OFFLOAD EQU 01h 64 XTCF_DMA_MODE EQU 02h 59 65 60 66 ; Subcommands for AH=1Eh, Lo-tech XT-CF features. … … 72 78 73 79 ;-------------------------------------------------------------------- 74 ; READ_XTCF_CONTROL_REGISTER_TO_DH 80 ; SET_XTCF_TRANSFER_MODE 81 ; Parameters: 82 ; DH: Mode to select, 83 ; i.e. XTCF_8BIT_PIO_MODE 84 ; Note there's no way to know if an 85 ; XT-CF adapter supports DMA, so the 86 ; user should enable DMA only if a 87 ; DMA-enabled XT-CFv3 is fitted. 88 ; DL: Drive Number 89 ;-------------------------------------------------------------------- 90 SET_XTCF_TRANSFER_MODE EQU 1 91 92 ;-------------------------------------------------------------------- 93 ; GET_XTCF_TRANSFER_MODE 75 94 ; Parameters: 76 95 ; DL: Drive Number 77 96 ; Returns: 78 ; DH: XT-CF Control Register contents 97 ; DL: Block mode sectors per block 98 ; configured 99 ; DH: One of the mode values listed above, 100 ; i.e. XTCF_8BIT_PIO_MODE 79 101 ;-------------------------------------------------------------------- 80 READ_XTCF_CONTROL_REGISTER_TO_DH EQU 1 81 82 ;-------------------------------------------------------------------- 83 ; WRITE_DH_TO_XTCF_CONTROL_REGISTER 84 ; Parameters: 85 ; DH: Byte to write to XT-CF Control Register 86 ; DL: Drive Number 87 ;-------------------------------------------------------------------- 88 WRITE_DH_TO_XTCF_CONTROL_REGISTER EQU 2 102 GET_XTCF_TRANSFER_MODE EQU 2 89 103 90 104 -
trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc
r542 r545 99 99 ;;; Word 1 100 100 .wControlBlockPort: 101 .bXTCFcontrolRegister: ; XT-CF autodetects ports102 101 .bSerialUnused resb 1 ; IDE Base Port for Control Block Registers 103 102 … … 121 120 122 121 STANDARD_CONTROL_BLOCK_OFFSET EQU 200h 123 XTIDE_CONTROL_BLOCK_OFFSET EQU 8h 124 XTCF_CONTROL_BLOCK_OFFSET EQU 10h 122 XTIDE_CONTROL_BLOCK_OFFSET EQU 8h ; for XTIDE, A3 is used to control selected register (CS0 vs CS1)... 123 XTCF_CONTROL_BLOCK_OFFSET EQU 10h ; ...and for XT-CF (all varients), it's A4 125 124 ADP50L_CONTROL_BLOCK_OFFSET EQU 10h 126 125 127 126 ; Default values for Port and PortCtrl, shared with the configurator 128 127 ; 129 DEVICE_XTIDE_DEFAULT_PORT EQU 300h 128 DEVICE_XTIDE_DEFAULT_PORT EQU 300h ; Also the default port for XT-CF 130 129 DEVICE_XTIDE_DEFAULT_PORTCTRL EQU (DEVICE_XTIDE_DEFAULT_PORT + XTIDE_CONTROL_BLOCK_OFFSET) 130 ; Note XT-CF control port is SHL 1 relative to XTIDE, and coded that way hence no need for specific definition like... 131 ; DEVICE_XTCF_DEFAULT_PORTCTRL EQU (DEVICE_XTIDE_DEFAULT_PORT + XTCF_CONTROL_BLOCK_OFFSET) 131 132 132 133 DEVICE_ATA_PRIMARY_PORT EQU 1F0h … … 158 159 ; IDE Register offsets are SHL 1 159 160 DEVICE_8BIT_XTCF_PIO8 EQU ((COUNT_OF_STANDARD_IDE_DEVICES+3)<<1) ; XT-CF using 8-bit PIO mode 160 DEVICE_8BIT_XTCF_ DMA EQU ((COUNT_OF_STANDARD_IDE_DEVICES+4)<<1) ; XT-CF using DMA161 DEVICE_8BIT_XTCF_ MEMMAP EQU ((COUNT_OF_STANDARD_IDE_DEVICES+5)<<1) ; XT-CF using Memory Mapped transfers (not I/O)161 DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD EQU ((COUNT_OF_STANDARD_IDE_DEVICES+4)<<1) ; XT-CF using 8-bit PIO mode, but with 16-bit instructions 162 DEVICE_8BIT_XTCF_DMA EQU ((COUNT_OF_STANDARD_IDE_DEVICES+5)<<1) ; XT-CFv3 using DMA 162 163 ; Memory Mapped I/O 163 164 DEVICE_8BIT_JRIDE_ISA EQU ((COUNT_OF_STANDARD_IDE_DEVICES+6)<<1) ; JR-IDE/ISA (Memory Mapped I/O) … … 196 197 MAX_USER_CHS_COUNT EQU (MAX_USER_CYLINDERS * MAX_USER_HEADS * MAX_USER_SECTORS_PER_TRACK) 197 198 FLG_DRVPARAMS_USERLBA EQU (1<<6) ; User specified LBA value 198 MIN_USER_LBA_COUNT EQU (MAX_USER_CHS_COUNT+1) 199 MAX_USER_LBA_COUNT EQU ((2^28)-1) 200 199 MIN_USER_LBA_COUNT EQU (MAX_USER_CHS_COUNT+1) ; Must be more than max CHS 200 MAX_USER_LBA_COUNT EQU ((2^28)-1) ; LBA28 limit 201 201 202 202 %endif ; ROMVARS_INC -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm
r540 r545 80 80 test bh, FLG_DRVNHEAD_DRV ; Wait already done for Master 81 81 jnz SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster 82 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MOTOR_STARTUP, FLG_STATUS_ DRDY)82 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MOTOR_STARTUP, FLG_STATUS_BSY) 83 83 call IdeWait_PollStatusFlagInBLwithTimeoutInBH 84 84 .SkipLongWaitSinceDriveIsNotPrimaryMaster: … … 88 88 call Idepack_FakeToSSBP 89 89 90 %ifdef MODULE_8BIT_IDE _ADVANCED90 %ifdef MODULE_8BIT_IDE 91 91 ; Enable 8-bit PIO mode for 8-bit ATA and XT-CF 92 92 push si 93 93 call AH9h_Enable8bitModeForDevice8bitAta 94 xor al, al ; XTCF_8BIT_PIO_MODE 94 %ifdef MODULE_8BIT_IDE_ADVANCED 95 mov al, XTCF_8BIT_PIO_MODE ; initialise with most basic transfer mode 95 96 call AH9h_SetModeFromALtoXTCF 97 %endif ; MODULE_8BIT_IDE_ADVANCED 96 98 pop si 97 %endif ; MODULE_8BIT_IDE _ADVANCED99 %endif ; MODULE_8BIT_IDE 98 100 99 101 ; Prepare to output Identify Device command … … 173 175 jne SHORT .WaitUntilNonTransferCommandCompletes 174 176 %ifdef MODULE_8BIT_IDE_ADVANCED 175 cmp BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_ XTCF_MEMMAP176 jae SHORT JrIdeTransfer_StartWithCommandInAL ; DEVICE_8BIT_ XTCF_MEMMAP, DEVICE_8BIT_JRIDE_ISA or DEVICE_8BIT_ADP50L177 cmp BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_JRIDE_ISA 178 jae SHORT JrIdeTransfer_StartWithCommandInAL ; DEVICE_8BIT_JRIDE_ISA or DEVICE_8BIT_ADP50L 177 179 %endif 178 180 jmp IdeTransfer_StartWithCommandInAL -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDmaBlock.asm
r526 r545 78 78 ; so we never need to separate transfer to more than 2 separate DMA operations. 79 79 80 ; Load XT-CF Control Register port to DX80 ; Load XT-CFv3 Control Register port to DX 81 81 add dl, XTCF_CONTROL_REGISTER 82 82 … … 90 90 shl cx, 1 91 91 %endif 92 cmp cx, ax 93 jbe SHORT .TransferLastDmaPageWithSizeInCX 92 cmp cx, ax ; if we won't cross a physical page boundary... 93 jbe SHORT .TransferLastDmaPageWithSizeInCX ; ...perform the transfer in one operation 94 94 95 ; Push size for second DMA page95 ; Calculate how much we can transfer on first and second rounds 96 96 xchg cx, ax ; CX = BYTEs for first page 97 97 sub ax, cx ; AX = BYTEs for second page 98 push ax 98 push ax ; Save bytes for second transfer on stack 99 99 100 100 ; Transfer first DMA page … … 108 108 ;-------------------------------------------------------------------- 109 109 ; StartDMAtransferForXTCFwithDmaModeInBL 110 ; Updated for XT-CFv3, 11-Apr-13 110 111 ; Parameters: 111 112 ; BL: Byte for DMA Mode Register 112 ; CX: Number of BYTEs to transfer (1...32768 since max block size is limited to 64) 113 ; DX: XTCF Control Register 113 ; CX: Number of BYTEs to transfer (512...32768 since max block size is limited to 64) 114 ; DX: XT-CFv3 Control Register 115 ; ES: Bits 3..0 have physical address bits 19..16 116 ; DI: Physical address bits 15..0 114 117 ; Returns: 115 ; Nothing118 ; ES:DI updated (CX is added) 116 119 ; Corrupts registers: 117 120 ; AX … … 122 125 ; Disable Interrupts and DMA Channel 3 during DMA setup 123 126 mov al, SET_CH3_MASK_BIT 124 cli ; Disable interrupts125 out MASK_REGISTER_DMA8_out, al 127 cli ; Disable interrupts - programming must be atomic 128 out MASK_REGISTER_DMA8_out, al ; Disable DMA Channel 3 126 129 127 130 ; Set DMA Mode (read or write using channel 3) … … 129 132 out MODE_REGISTER_DMA8_out, al 130 133 131 ; Set address to DMA controller 132 out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte 134 ; Send start address to DMA controller 133 135 mov ax, es 134 136 out PAGE_DMA8_CH_3, al 135 137 mov ax, di 138 out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte 136 139 out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; Low byte 137 140 mov al, ah … … 140 143 ; Set number of bytes to transfer (DMA controller must be programmed number of bytes - 1) 141 144 mov ax, cx 142 dec ax ; DMA controller is programmed for one byte less145 dec ax ; DMA controller is programmed for one byte less 143 146 out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; Low byte 144 147 mov al, ah … … 147 150 ; Enable DMA Channel 3 148 151 mov al, CLEAR_CH3_MASK_BIT 149 out MASK_REGISTER_DMA8_out, al ; Enable DMA Channel 3150 sti ; Enable interrupts152 out MASK_REGISTER_DMA8_out, al ; Enable DMA Channel 3 153 sti ; Enable interrupts 151 154 155 ; XT-CF transfers 16 bytes at a time. We need to manually start transfer for every block by writing (anything) 156 ; to the XT-CFv3 Control Register, which raises DRQ thereby passing system control to the 8237 DMA controller. 157 ; The XT-CFv3 logic releases DRQ after 16 transfers, thereby handing control back to the CPU and allowing any other IRQs or 158 ; DRQs to be serviced (which, on the PC and PC/XT will include DRAM refresh via DMA channel 0). The 16-byte transfers can 159 ; also be interrupted by the DMA controller raising TC (i.e. when done). Each transfer cannot be otherwise interrupted 160 ; and is therefore atomic (and hence fast). 152 161 153 %if 0 ; Slow DMA code 154 ; XT-CF transfers 16 bytes at a time. We need to manually 155 ; start transfer for every block. 156 ALIGN JUMP_ALIGN 157 .TransferNextBlock: 158 mov al, RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER 159 cli ; We want no ISR to read DMA Status Register before we do 160 out dx, al ; Transfer up to 16 bytes to/from XT-CF card 161 ; * Here XT-CF sets CPU to wait states during transfer * 162 in al, STATUS_REGISTER_DMA8_in 163 sti 164 test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT 165 jz SHORT .TransferNextBlock ; All bytes transferred? 162 %if 0 ; Slow DMA code - works by checking 8237 status register after each 16-byte transfer, until it reports TC has been raised. 163 ;ALIGN JUMP_ALIGN 164 ;.TransferNextBlock: 165 ; cli ; We want no ISR to read DMA Status Register before we do 166 ; out dx, al ; Transfer up to 16 bytes to/from XT-CF card 167 ; in al, STATUS_REGISTER_DMA8_in 168 ; sti 169 ; test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT 170 ; jz SHORT .TransferNextBlock ; All bytes transferred? 166 171 %endif ; Slow DMA code 167 172 168 169 %if 1 ; Fast DMA code 170 push cx 171 add cx, BYTE 15 ; Include any partial DMA block (since we had to divide transfer to 64k physical pages) 172 eSHR_IM cx, 4 ; Drive Block size to 16 Byte DMA Block Size 173 174 .JustOneMoreDmaBlock: 175 mov al, RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER 176 ALIGN JUMP_ALIGN 173 %if 1 ; Fast DMA code - perform computed number of transfers, then check DMA status register to be sure 174 push cx ; need byte count to update pointer at the end 175 add cx, BYTE 15 ; We'll divide transfers in 16-byte atomic transfers, 176 eSHR_IM cx, 4 ; so include any partial block, which will be terminated 177 ALIGN JUMP_ALIGN ; by the DMA controller raising T/C 177 178 .TransferNextDmaBlock: 178 out dx, al ; Transfer 16 bytes to/from XT-CF card 179 loop .TransferNextDmaBlock 180 179 out dx, al ; Transfer up to 16 bytes to/from XT-CF card 180 loop .TransferNextDmaBlock ; dec CX and loop if CX > 0, also adds required wait-state 181 181 inc cx ; set up CX, in case we need to do an extra iteration 182 in al, STATUS_REGISTER_DMA8_in 183 test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT 184 jz SHORT . JustOneMoreDmaBlock ; it wasn't set soget more bytes185 pop cx 182 in al, STATUS_REGISTER_DMA8_in ; check 8237 DMA controller status flags... 183 test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT ; ... for channel 3 terminal count 184 jz SHORT .TransferNextDmaBlock ; If not set, get more bytes 185 pop cx ; get back requested bytes 186 186 %endif ; Fast DMA code 187 187 188 ; Update physical address in ES:DI - since IO might need several calls through this function either from here 189 ; if crossing a physical page boundary, and from IdeTransfer.asm if requested sectors was > PIOVARS.wSectorsInBlock 190 mov ax, es ; copy physical page address to ax 191 add di, cx ; add requested bytes to di 192 adc al, 0 ; and increment physical page address, if required 193 mov es, ax ; and save it back in es 188 194 189 ; Restore XT-CF to normal operation190 mov al, XTCF_DMA_MODE191 out dx, al192 193 ; Increment physical address in ES:DI194 mov ax, es195 add di, cx196 adc al, ah197 mov es, ax198 195 ret -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm
r536 r545 52 52 ;-------------------------------------------------------------------- 53 53 IdeIO_InputToALfromIdeRegisterInDL: 54 xor dh, dh ; IDE Register index now in DX 55 mov bx, dx ; and BX 54 xor dh, dh ; IDE Register index now in DX... 56 55 mov al, [di+DPT_ATA.bDevice] 57 56 cmp al, DEVICE_8BIT_XTIDE_REV2 58 57 jb SHORT .InputToALfromRegisterInDX ; Standard IDE controllers and XTIDE rev 1 58 mov bx, dx ; ...and BX for A0<->A3 swap and for memory mapped I/O 59 59 60 60 %ifdef MODULE_8BIT_IDE_ADVANCED … … 109 109 ; At this point remaining controllers (JRIDE, XTCF and ADP50L) all have a control 110 110 ; block offset of 8 or (8<<1) so we add 8 here and do the SHL 1 later if needed. 111 add dx, 8111 add dx, BYTE 8 112 112 cmp bl, DEVICE_8BIT_JRIDE_ISA 113 113 jb SHORT IdeIO_OutputALtoIdeRegisterInDL.ShlRegisterIndexInDXandOutputAL ; All XT-CF modes … … 127 127 ; a small trick since we only access Device Control Register at 128 128 ; offset 6h: Always clear A3 and set A0. 129 mov bh, dh ; Zero BH129 call AccessDPT_GetIdevarsToCSBX 130 130 add dx, [cs:bx+IDEVARS.wControlBlockPort] 131 131 xor dl, 1001b ; Clear A3, Set A0 … … 134 134 135 135 .OutputALtoControlBlockRegisterInDX: 136 call AccessDPT_GetIdevarsToCSBX ; *FIXME* Why is this call here but not in the above block?136 call AccessDPT_GetIdevarsToCSBX 137 137 add dx, [cs:bx+IDEVARS.wControlBlockPort] 138 138 out dx, al -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdePioBlock.asm
r526 r545 20 20 ; 21 21 22 ; Modified by JJP for XT-CFv3 support, Mar-13 23 22 24 ; Section containing code 23 25 SECTION .text 26 27 28 ; -------------------------------------------------------------------------------------------------- 29 ; 30 ; READ routines follow 31 ; 32 ; -------------------------------------------------------------------------------------------------- 33 24 34 25 35 %ifdef MODULE_8BIT_IDE … … 50 60 51 61 ;-------------------------------------------------------------------- 52 ; IdePioBlock_ReadFromXtideRev2 or rev 1 with swapped A0 and A3 (chuck-mod) 53 ; Parameters: 54 ; CX: Block size in 512 byte sectors 55 ; DX: IDE Data port address 62 ; IdePioBlock_ReadFrom8bitDataPort 63 ; 64 ; 8-bit PIO from a single data port. 65 ; 66 ; Parameters: 67 ; CX: Block size in 512 byte sectors 68 ; DX: IDE Data port address 56 69 ; ES:DI: Normalized ptr to buffer to receive data 57 70 ; Returns: … … 60 73 ; AX, BX, CX 61 74 ;-------------------------------------------------------------------- 62 %ifndef USE_186 ; 8086/8088 compatible WORD read 63 64 ALIGN JUMP_ALIGN 65 IdePioBlock_ReadFromXtideRev2: 75 ALIGN JUMP_ALIGN 76 IdePioBlock_ReadFrom8bitDataPort: 77 %ifdef USE_186 78 shl cx, 9 ; Sectors to BYTEs 79 rep insb 80 ret 81 %else ; If 8088/8086 82 UNROLL_SECTORS_IN_CX_TO_OWORDS 83 ALIGN JUMP_ALIGN 84 .ReadNextOword: 85 %rep 16 ; BYTEs 86 in al, dx ; Read BYTE 87 stosb ; Store BYTE to [ES:DI] 88 %endrep 89 loop .ReadNextOword 90 ret 91 %endif 92 93 %endif ; MODULE_8BIT_IDE 94 95 96 ;-------------------------------------------------------------------- 97 ; IdePioBlock_ReadFrom16bitDataPort 98 ; 99 ; 16-bit PIO from a single data port. 100 ; 101 ; Parameters: 102 ; CX: Block size in 512 byte sectors 103 ; DX: IDE Data port address 104 ; ES:DI: Normalized ptr to buffer to receive data 105 ; Returns: 106 ; Nothing 107 ; Corrupts registers: 108 ; AX, BX, CX 109 ;-------------------------------------------------------------------- 110 ALIGN JUMP_ALIGN 111 IdePioBlock_ReadFrom16bitDataPort: 112 %ifdef USE_186 113 xchg cl, ch ; Sectors to WORDs 114 rep insw 115 ret 116 117 %else ; If 8088/8086 66 118 UNROLL_SECTORS_IN_CX_TO_OWORDS 67 119 ALIGN JUMP_ALIGN 68 120 .ReadNextOword: 69 121 %rep 8 ; WORDs 70 in ax, dx ; Read WORD 71 stosw ; Store WORD to [ES:DI] 72 %endrep 73 loop .ReadNextOword 74 ret 75 122 in ax, dx ; Read BYTE 123 stosw ; Store BYTE to [ES:DI] 124 %endrep 125 loop .ReadNextOword 126 ret 76 127 %endif 77 128 78 79 ;--------------------------------------------------------------------80 ; IdePioBlock_ReadFrom8bitDataPort CF-XT when using 8-bit PIO81 ; Parameters:82 ; CX: Block size in 512 byte sectors83 ; DX: IDE Data port address84 ; ES:DI: Normalized ptr to buffer to receive data85 ; Returns:86 ; Nothing87 ; Corrupts registers:88 ; AX, BX, CX89 ;--------------------------------------------------------------------90 ALIGN JUMP_ALIGN91 IdePioBlock_ReadFrom8bitDataPort:92 %ifdef USE_18693 shl cx, 9 ; Sectors to BYTEs94 rep insb95 ret96 97 %else ; If 8088/808698 UNROLL_SECTORS_IN_CX_TO_OWORDS99 ALIGN JUMP_ALIGN100 .ReadNextOword:101 %rep 16 ; BYTEs102 in al, dx ; Read BYTE103 stosb ; Store BYTE to [ES:DI]104 %endrep105 loop .ReadNextOword106 ret107 %endif108 109 110 ;--------------------------------------------------------------------111 ; IdePioBlock_WriteToXtideRev1112 ; Parameters:113 ; CX: Block size in 512-byte sectors114 ; DX: IDE Data port address115 ; ES:SI: Normalized ptr to buffer containing data116 ; Returns:117 ; Nothing118 ; Corrupts registers:119 ; AX, BX, CX, DX120 ;--------------------------------------------------------------------121 ALIGN JUMP_ALIGN122 IdePioBlock_WriteToXtideRev1:123 push ds124 UNROLL_SECTORS_IN_CX_TO_QWORDS125 mov bl, 8 ; Bit mask for toggling data low/high reg126 push es ; Copy ES...127 pop ds ; ...to DS128 ALIGN JUMP_ALIGN129 .OutswLoop:130 %rep 4 ; WORDs131 XTIDE_OUTSW132 %endrep133 loop .OutswLoop134 pop ds135 ret136 137 138 ;--------------------------------------------------------------------139 ; IdePioBlock_WriteToXtideRev2 or rev 1 with swapped A0 and A3 (chuck-mod)140 ; Parameters:141 ; CX: Block size in 512-byte sectors142 ; DX: IDE Data port address143 ; ES:SI: Normalized ptr to buffer containing data144 ; Returns:145 ; Nothing146 ; Corrupts registers:147 ; AX, BX, CX, DX148 ;--------------------------------------------------------------------149 ALIGN JUMP_ALIGN150 IdePioBlock_WriteToXtideRev2:151 UNROLL_SECTORS_IN_CX_TO_QWORDS152 push ds153 push es ; Copy ES...154 pop ds ; ...to DS155 ALIGN JUMP_ALIGN156 .WriteNextQword:157 %rep 4 ; WORDs158 XTIDE_MOD_OUTSW159 %endrep160 loop .WriteNextQword161 pop ds162 ret163 164 165 ;--------------------------------------------------------------------166 ; IdePioBlock_WriteTo8bitDataPort XT-CF when using 8-bit PIO167 ; Parameters:168 ; CX: Block size in 512-byte sectors169 ; DX: IDE Data port address170 ; ES:SI: Normalized ptr to buffer containing data171 ; Returns:172 ; Nothing173 ; Corrupts registers:174 ; AX, BX, CX, DX175 ;--------------------------------------------------------------------176 ALIGN JUMP_ALIGN177 IdePioBlock_WriteTo8bitDataPort:178 179 %ifdef USE_186180 shl cx, 9 ; Sectors to BYTEs181 es ; Source is ES segment182 rep outsb183 ret184 185 %else ; If 8088/8086186 UNROLL_SECTORS_IN_CX_TO_DWORDS187 push ds188 push es189 pop ds190 ALIGN JUMP_ALIGN191 .WriteNextDword:192 %rep 4 ; BYTEs193 lodsb ; Load BYTE from [DS:SI]194 out dx, al ; Write BYTE195 %endrep196 loop .WriteNextDword197 pop ds198 ret199 %endif200 201 %endif ; MODULE_8BIT_IDE202 203 204 ;--------------------------------------------------------------------205 ; IdePioBlock_ReadFromXtideRev2 (when 80186/80188 instructions are available)206 ; IdePioBlock_ReadFrom16bitDataPort Normal 16-bit IDE207 ; IdePioBlock_ReadFrom32bitDataPort VLB/PCI 32-bit IDE208 ; Parameters:209 ; CX: Block size in 512 byte sectors210 ; DX: IDE Data port address211 ; ES:DI: Normalized ptr to buffer to receive data212 ; Returns:213 ; Nothing214 ; Corrupts registers:215 ; AX, BX, CX216 ;--------------------------------------------------------------------217 ALIGN JUMP_ALIGN218 %ifdef USE_186219 %ifdef MODULE_8BIT_IDE220 IdePioBlock_ReadFromXtideRev2:221 %endif222 %endif223 IdePioBlock_ReadFrom16bitDataPort:224 xchg cl, ch ; Sectors to WORDs225 rep226 db 6Dh ; INSW227 ret228 129 229 130 ;-------------------------------------------------------------------- … … 239 140 240 141 241 ;-------------------------------------------------------------------- 242 ; IdePioBlock_WriteTo16bitDataPort Normal 16-bit IDE 142 143 ; -------------------------------------------------------------------------------------------------- 144 ; 145 ; WRITE routines follow 146 ; 147 ; -------------------------------------------------------------------------------------------------- 148 149 %ifdef MODULE_8BIT_IDE 150 151 ;-------------------------------------------------------------------- 152 ; IdePioBlock_WriteToXtideRev1 153 ; Parameters: 154 ; CX: Block size in 512-byte sectors 155 ; DX: IDE Data port address 156 ; ES:SI: Normalized ptr to buffer containing data 157 ; Returns: 158 ; Nothing 159 ; Corrupts registers: 160 ; AX, BX, CX, DX 161 ;-------------------------------------------------------------------- 162 ALIGN JUMP_ALIGN 163 IdePioBlock_WriteToXtideRev1: 164 push ds 165 UNROLL_SECTORS_IN_CX_TO_QWORDS 166 mov bl, 8 ; Bit mask for toggling data low/high reg 167 push es ; Copy ES... 168 pop ds ; ...to DS 169 ALIGN JUMP_ALIGN 170 .OutswLoop: 171 %rep 4 ; WORDs 172 XTIDE_OUTSW 173 %endrep 174 loop .OutswLoop 175 pop ds 176 ret 177 178 179 ;-------------------------------------------------------------------- 180 ; IdePioBlock_WriteToXtideRev2 or rev 1 with swapped A0 and A3 (chuck-mod) 181 ; Parameters: 182 ; CX: Block size in 512-byte sectors 183 ; DX: IDE Data port address 184 ; ES:SI: Normalized ptr to buffer containing data 185 ; Returns: 186 ; Nothing 187 ; Corrupts registers: 188 ; AX, BX, CX, DX 189 ;-------------------------------------------------------------------- 190 ALIGN JUMP_ALIGN 191 IdePioBlock_WriteToXtideRev2: 192 UNROLL_SECTORS_IN_CX_TO_QWORDS 193 push ds 194 push es ; Copy ES... 195 pop ds ; ...to DS 196 ALIGN JUMP_ALIGN 197 .WriteNextQword: 198 %rep 4 ; WORDs 199 XTIDE_MOD_OUTSW ; special macro 200 %endrep 201 loop .WriteNextQword 202 pop ds 203 ret 204 205 206 ;-------------------------------------------------------------------- 207 ; IdePioBlock_WriteTo8bitDataPort 208 ; Parameters: 209 ; CX: Block size in 512-byte sectors 210 ; DX: IDE Data port address 211 ; ES:SI: Normalized ptr to buffer containing data 212 ; Returns: 213 ; Nothing 214 ; Corrupts registers: 215 ; AX, BX, CX, DX 216 ;-------------------------------------------------------------------- 217 ALIGN JUMP_ALIGN 218 IdePioBlock_WriteTo8bitDataPort: 219 %ifdef USE_186 220 shl cx, 9 ; Sectors to BYTEs 221 es ; Source is ES segment 222 rep outsb 223 ret 224 225 %else ; If 8088/8086 226 UNROLL_SECTORS_IN_CX_TO_QWORDS 227 push ds 228 ;mov ax, es 229 ;mov ds, ax ; move es to ds via ax (does this run faster on 8088?) 230 push es 231 pop ds 232 ALIGN JUMP_ALIGN 233 .WriteNextQword: 234 %rep 8 ; BYTEs 235 lodsb ; Load BYTE from [DS:SI] 236 out dx, al ; Write BYTE 237 %endrep 238 loop .WriteNextQword 239 pop ds 240 ret 241 %endif 242 243 %endif ; MODULE_8BIT_IDE 244 245 246 ;-------------------------------------------------------------------- 247 ; IdePioBlock_WriteTo16bitDataPort Normal 16-bit IDE, XT-CFv3 in BIU Mode 243 248 ; IdePioBlock_WriteTo32bitDataPort VLB/PCI 32-bit IDE 244 249 ; Parameters: 245 ; CX: 246 ; DX: 250 ; CX: Block size in 512-byte sectors 251 ; DX: IDE Data port address 247 252 ; ES:SI: Normalized ptr to buffer containing data 248 253 ; Returns: … … 253 258 ALIGN JUMP_ALIGN 254 259 IdePioBlock_WriteTo16bitDataPort: 260 %ifdef USE_186 255 261 xchg cl, ch ; Sectors to WORDs 256 262 es ; Source is ES segment 257 rep 258 db 6Fh ; OUTSW 259 ret 263 rep outsw 264 ret 265 266 %else ; If 8088/8086 267 UNROLL_SECTORS_IN_CX_TO_QWORDS 268 push ds 269 ;mov ax, es 270 ;mov ds, ax ; move es to ds via ax (does this run faster on 8088?) 271 push es 272 pop ds 273 ALIGN JUMP_ALIGN 274 .WriteNextQword: 275 %rep 4 ; WORDs 276 lodsw ; Load BYTE from [DS:SI] 277 out dx, ax ; Write BYTE 278 %endrep 279 loop .WriteNextQword 280 pop ds 281 ret 282 %endif ; if/else USE_186 260 283 261 284 ;-------------------------------------------------------------------- -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeTransfer.asm
r539 r545 346 346 dw IdePioBlock_ReadFrom8bitDataPort ; 2, DEVICE_8BIT_ATA 347 347 dw IdePioBlock_ReadFromXtideRev1 ; 3, DEVICE_8BIT_XTIDE_REV1 348 dw IdePioBlock_ReadFromXtideRev2 ; 4, DEVICE_8BIT_XTIDE_REV2 348 dw IdePioBlock_ReadFrom16bitDataPort ; 4, DEVICE_8BIT_XTIDE_REV2 349 dw IdePioBlock_ReadFrom8bitDataPort ; 5, DEVICE_8BIT_XTCF_PIO8 350 dw IdePioBlock_ReadFrom16bitDataPort ; 6, DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD 349 351 %ifdef MODULE_8BIT_IDE_ADVANCED 350 dw IdePioBlock_ReadFrom8bitDataPort ; 5, DEVICE_8BIT_XTCF_PIO8 351 dw IdeDmaBlock_ReadFromXTCF ; 6, DEVICE_8BIT_XTCF_DMA 352 %endif 353 %endif 352 dw IdeDmaBlock_ReadFromXTCF ; 7, DEVICE_8BIT_XTCF_DMA 353 %endif ; MODULE_8BIT_IDE_ADVANCED 354 %endif ; MODULE_8BIT_IDE 354 355 355 356 … … 361 362 dw IdePioBlock_WriteToXtideRev1 ; 3, DEVICE_8BIT_XTIDE_REV1 362 363 dw IdePioBlock_WriteToXtideRev2 ; 4, DEVICE_8BIT_XTIDE_REV2 364 dw IdePioBlock_WriteTo8bitDataPort ; 5, DEVICE_8BIT_XTCF_PIO8 365 dw IdePioBlock_WriteTo16bitDataPort ; 6, DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD 363 366 %ifdef MODULE_8BIT_IDE_ADVANCED 364 dw IdePioBlock_WriteTo8bitDataPort ; 5, DEVICE_8BIT_XTCF_PIO8 365 dw IdeDmaBlock_WriteToXTCF ; 6, DEVICE_8BIT_XTCF_DMA 366 %endif 367 %endif 367 dw IdeDmaBlock_WriteToXTCF ; 7, DEVICE_8BIT_XTCF_DMA 368 %endif ; MODULE_8BIT_IDE_ADVANCED 369 %endif ; MODULE_8BIT_IDE -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/JrIdeTransfer.asm
r538 r545 67 67 68 68 ; Get far pointer to Sector Access Window 69 mov dx, [di+DPT.wBasePort]70 69 cmp BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_JRIDE_ISA 71 jb SHORT .GetSectorAccessWindowForXTCF 72 73 ; Get Sector Access Window for JR-IDE/ISA and ADP50L 74 mov ds, dx ; Segment for JR-IDE/ISA and ADP50L 75 mov di, JRIDE_SECTOR_ACCESS_WINDOW_OFFSET 76 je SHORT .SectorAccessWindowLoadedToDSDI 70 mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA and ADP50L 77 71 mov di, ADP50L_SECTOR_ACCESS_WINDOW_OFFSET 78 jmp SHORT .SectorAccessWindowLoadedToDSDI 79 80 .GetSectorAccessWindowForXTCF: 81 xor di, di 82 add dl, XTCF_CONTROL_REGISTER 83 in al, dx ; Read high byte for Sector Access Window segment 84 xchg ah, al 85 mov ds, ax 72 eCMOVE di, JRIDE_SECTOR_ACCESS_WINDOW_OFFSET 86 73 87 74 ; Are we reading or writing? -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH1Eh_XTCF.asm
r526 r545 1 1 ; Project name : XTIDE Universal BIOS 2 ; Description : Int 13h function AH=1Eh, Lo-tech XT-CF features. 2 ; Description : Int 13h function AH=1Eh, Lo-tech XT-CF features 3 ; 4 ; More information at http://www.lo-tech.co.uk/XT-CF 3 5 4 6 ; … … 17 19 ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html 18 20 ; 21 22 ; Modified by JJP for XT-CFv3 support, Mar-13 19 23 20 24 ; Section containing code … … 42 46 jmp Int13h_ReturnFromHandlerAfterStoringErrorCodeFromAH 43 47 %else 44 push Int13h_ReturnFromHandlerAfterStoringErrorCodeFromAH48 push Int13h_ReturnFromHandlerAfterStoringErrorCodeFromAH 45 49 ; Fall to ProcessXTCFsubcommandFromAL 46 50 %endif … … 56 60 ; AH: Int 13h return status 57 61 ; CF: 0 if successful, 1 if error 62 ; DX Command return values (see XTCF.inc) 58 63 ; Corrupts registers: 59 64 ; AL, BX, CX, DX, SI … … 62 67 ; IS_THIS_DRIVE_XTCF. We check this for all commands. 63 68 call AccessDPT_IsThisDeviceXTCF 64 jne SHORT XTCFnotFound69 jne SHORT .XTCFnotFound 65 70 and ax, BYTE 7Fh ; Subcommand now in AX (clears AH and CF) 66 jz SHORT . ReturnWithSuccess ; IS_THIS_DRIVE_XTCF71 jz SHORT .XTCFfound ; Sub-function IS_THIS_DRIVE_XTCF (=0) 67 72 68 ; READ_XTCF_CONTROL_REGISTER_TO_DH 69 dec ax ; Subcommand 70 jnz SHORT .SkipReadXtcfControlRegisterToDH 71 mov dx, [di+DPT.wBasePort] 72 add dl, XTCF_CONTROL_REGISTER ; Will never overflow (keeps CF cleared) 73 in al, dx 74 mov [bp+IDEPACK.intpack+INTPACK.dh], al 75 .ReturnWithSuccess: 76 ret ; With AH and CF cleared 73 dec ax ; Test subcommand... 74 jz SHORT .SetXTCFtransferMode ; ...for value 1 (SET_XTCF_TRANSFER_MODE) 77 75 78 .SkipReadXtcfControlRegisterToDH: 79 ; WRITE_DH_TO_XTCF_CONTROL_REGISTER 80 dec ax ; Subcommand 81 jnz SHORT XTCFnotFound ; Invalid subcommand 82 mov al, [bp+IDEPACK.intpack+INTPACK.dh] 83 ; Fall to AH1Eh_ChangeXTCFmodeBasedOnControlRegisterInAL 76 dec ax ; Test subcommand for value 2 (GET_XTCF_TRANSFER_MODE) 77 jnz SHORT .XTCFnotFound ; Invalid subcommand 78 79 ; GET_XTCF_TRANSFER_MODE 80 call AH1Eh_GetCurrentXTCFmodeToAX 81 mov dl, [di+DPT_ATA.bBlockSize] 82 mov [bp+IDEPACK.intpack+INTPACK.dh], al ; return mode value... 83 mov [bp+IDEPACK.intpack+INTPACK.dl], dl ; ...and block size, via INTPACK... 84 .XTCFfound: 85 ret ; ...with AH and CF cleared 86 87 .XTCFnotFound: 88 .AH1Eh_LoadInvalidCommandToAHandSetCF: 89 stc ; set carry flag since XT-CF not found 90 mov ah, RET_HD_INVALID 91 ret ; and return 92 93 .SetXTCFtransferMode: 94 mov al, [bp+IDEPACK.intpack+INTPACK.dh] ; get specified mode (eg XTCF_DMA_MODE) 95 ; and fall to AH1Eh_ChangeXTCFmodeBasedOnControlRegisterInAL 84 96 85 97 86 98 ;-------------------------------------------------------------------- 87 ; AH1Eh_ChangeXTCFmodeBasedOn ControlRegisterInAL99 ; AH1Eh_ChangeXTCFmodeBasedOnModeInAL 88 100 ; Parameters: 89 ; AL: XT-CF Control Register101 ; AL: XT-CF Mode (see XTCF.inc) 90 102 ; DS:DI: Ptr to DPT (in RAMVARS segment) 91 103 ; SS:BP: Ptr to IDEPACK 92 ; Returns: 104 ; Returns: 93 105 ; AH: Int 13h return status 94 106 ; CF: 0 if successful, 1 if error … … 96 108 ; AL, BX, CX, DX, SI 97 109 ;-------------------------------------------------------------------- 98 AH1Eh_ChangeXTCFmodeBasedOnControlRegisterInAL: 99 ; Output Control Register 100 mov dx, [di+DPT.wBasePort] 101 add dl, XTCF_CONTROL_REGISTER 102 out dx, al 110 AH1Eh_ChangeXTCFmodeBasedOnModeInAL: 111 ; Note: Control register (as of XT-CFv3) is now a write-only register, 112 ; whos purpose is *only* to raise DRQ. The register cannot be read. 113 ; Selected transfer mode is stored in BIOS variable (DPT_ATA.bDevice). 103 114 104 115 ; We always need to enable 8-bit mode since 16-bit mode is restored 105 116 ; when controller is reset (AH=00h or 0Dh) 117 ; 118 ; Note that when selecting 'DEVICE_8BIT_PIO_MODE_WITH_BIU_OFFLOAD' mode, 119 ; the ATA device (i.e. CompactFlash card) will operate in 8-bit mode, but 120 ; data will be transferred from it's data register using 16-bit CPU instructions 121 ; like REP INSW. This works because XT-CF adapters are 8-bit cards, and 122 ; the BIU in the machine splits each WORD requested by the CPU into two 8-bit 123 ; ISA cycles at base+0h and base+1h. The XT-CF cards do not decode A0, hence 124 ; both accesses appear the same to the card and the BIU then re-constructs 125 ; the data for presentation to the CPU. 126 ; 127 ; Also note though that some machines, noteably AT&T PC6300, have hardware 128 ; errors in the BIU logic, resulting in reversed byte ordering. Therefore, 129 ; mode DEVICE_8BIT_PIO is the default transfer mode for best system 130 ; compatibility. 131 106 132 ePUSH_T bx, AH23h_Enable8bitPioMode 107 133 108 ; Convert Control Register Contents to device code109 test al, al110 jz SHORT .Set8bitPioMode111 cmp al, XTCF_MEMORY_MAPPED_MODE112 j ae SHORT .SetMemoryMappedMode134 ; Convert mode to device type (see XTCF.inc for full details) 135 and ax, 3 136 jz SHORT .Set8bitPioMode ; XTCF_8BIT_PIO_MODE = 0 137 dec ax ; XTCF_8BIT_PIO_MODE_WITH_BIU_OFFLOAD = 1 138 jz SHORT .Set8bitPioModeWithBIUOffload 113 139 114 ; Set DMA Mode140 ; XTCF_DMA_MODE = 2 (allow 3 as well for more optimized code) 115 141 mov BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_XTCF_DMA 142 143 ; DMA transfers have limited block sizee 116 144 mov al, [di+DPT_ATA.bBlockSize] 117 cmp al, XTCF_DMA_MODE_MAX_BLOCK_SIZE 118 jbe SHORT AH24h_SetBlockSize 119 mov al, XTCF_DMA_MODE_MAX_BLOCK_SIZE 120 jmp SHORT AH24h_SetBlockSize 121 122 .SetMemoryMappedMode: 123 mov al, DEVICE_8BIT_XTCF_MEMMAP 124 SKIP2B bx 145 MIN_U al, XTCF_DMA_MODE_MAX_BLOCK_SIZE 146 jmp AH24h_SetBlockSize 147 ; exit via ret in AH24_SetBlockSize then through AH23h_Enable8bitPioMode 125 148 126 149 .Set8bitPioMode: 127 mov al, DEVICE_8BIT_XTCF_PIO8 128 mov [di+DPT_ATA.bDevice], al 129 ret ; Via AH23h_Enable8bitPioMode 150 mov BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_XTCF_PIO8 151 ret ; through AH23h_Enable8bitPioMode 152 153 .Set8bitPioModeWithBIUOffload: 154 mov BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD 155 ret ; through AH23h_Enable8bitPioMode 130 156 131 157 132 158 ;-------------------------------------------------------------------- 133 ; AH1Eh_ DetectXTCFwithBasePortInDX159 ; AH1Eh_GetCurrentXTCFmodeToAX 134 160 ; Parameters: 135 ; DX: Base I/O port address to check 136 ; Returns: 137 ; AH: RET_HD_SUCCESS if XT-CF is found from port 138 ; RET_HD_INVALID if XT-CF is not found 139 ; CF: Cleared if XT-CF found 140 ; Set if XT-CF not found 161 ; DS:DI: Ptr to DPT (in RAMVARS segment) 162 ; Returns: 163 ; AX: XT-CF mode (XTCF_8BIT_PIO_MODE, XTCF_8BIT_PIO_MODE_WITH_BIU_OFFLOAD or XTCF_DMA_MODE) 164 ; CF: Clear 141 165 ; Corrupts registers: 142 ; AL166 ; Nothing 143 167 ;-------------------------------------------------------------------- 144 AH1Eh_DetectXTCFwithBasePortInDX: 145 push dx 146 add dl, XTCF_CONTROL_REGISTER_INVERTED_in ; set DX to XT-CF config register (inverted) 147 in al, dx ; get value 148 mov ah, al ; save in ah 149 inc dx ; set DX to XT-CF config register (non-inverted) 150 in al, dx ; get value 151 not al ; invert value 152 pop dx 153 sub ah, al ; do they match? (clear AH if they do) 154 jz SHORT XTCFfound 155 156 XTCFnotFound: 157 AH1Eh_LoadInvalidCommandToAHandSetCF: 158 stc ; set carry flag since XT-CF not found 159 mov ah, RET_HD_INVALID 160 XTCFfound: 161 ret ; and return 168 AH1Eh_GetCurrentXTCFmodeToAX: 169 eMOVZX ax, BYTE [di+DPT_ATA.bDevice] ; get current mode from DPT 170 sub al, DEVICE_8BIT_XTCF_PIO8 171 shr ax, 1 ; Device type to XT-CF mode 172 ret -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH24h_HSetBlocks.asm
r526 r545 63 63 cmp al, XTCF_DMA_MODE_MAX_BLOCK_SIZE 64 64 jbe SHORT .NoNeedToLimitBlockSize 65 66 ; Return error if we tried too large block for XT-CF. 67 ; Do not limit it to maximum supported since software calling AH=24h 68 ; must know what the actual block size is. 65 69 cmp BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_XTCF_DMA 66 je SHORT AH1Eh_LoadInvalidCommandToAHandSetCF70 je SHORT ProcessXTCFsubcommandFromAL.AH1Eh_LoadInvalidCommandToAHandSetCF 67 71 .NoNeedToLimitBlockSize: 68 72 %endif ; MODULE_8BIT_IDE_ADVANCED … … 77 81 pop bx 78 82 jnc SHORT .StoreBlockSize 79 mov bl, 1 ; Block size 1 will always work 83 84 ; Drive disabled block mode since we tried unsupported block size. 85 ; We must adjust DPT accordingly. 86 mov bl, 1 ; Block size 1 will always work (=Block mode disabled) 80 87 .StoreBlockSize: ; Store new block size to DPT and return 81 88 mov [di+DPT_ATA.bBlockSize], bl -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH8h_HParams.asm
r543 r545 58 58 59 59 test byte [bp+IDEPACK.intpack+INTPACK.dl], 080h 60 jnz .Done60 jnz SHORT .CalledForHardDrive 61 61 62 62 mov [bp+IDEPACK.intpack+INTPACK.bl], bl … … 67 67 call FloppyDrive_GetCountToAX 68 68 69 . Done:69 .CalledForHardDrive: 70 70 mov ah, dh 71 71 … … 133 133 %ifdef MODULE_SERIAL_FLOPPY 134 134 mov bl, [di+DPT.bFlagsHigh] 135 %ifndef CHECK_FOR_UNUSED_ENTRYPOINTS ; not sure why this is needed for preprocessor-only136 135 eSHR_IM bl, FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION 137 %endif138 136 %endif 139 137 ret -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH9h_HInit.asm
r542 r545 114 114 ;;; Set XT-CF mode 115 115 %ifdef MODULE_8BIT_IDE_ADVANCED 116 call AccessDPT_GetIdevarsToCSBX 117 mov al, [cs:bx+IDEVARS.bXTCFcontrolRegister] 116 call AH1Eh_GetCurrentXTCFmodeToAX 118 117 call AH9h_SetModeFromALtoXTCF 119 118 STORE_ERROR_FLAG_TO_DPT FLG_INITERROR_FAILED_TO_SET_XTCF_MODE … … 284 283 call AccessDPT_IsThisDeviceXTCF 285 284 jne SHORT IgnoreInvalidCommandError 286 jmp AH1Eh_ChangeXTCFmodeBasedOn ControlRegisterInAL285 jmp AH1Eh_ChangeXTCFmodeBasedOnModeInAL 287 286 %endif ; MODULE_8BIT_IDE_ADVANCED 288 287 -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/EBIOS/AH48h_GetExtendedDriveParameters.asm
r544 r545 139 139 sbb dx, (MAX_SECTOR_COUNT_TO_RETURN_PCHS+1) >> 16 140 140 sbb bx, cx ; Zero 141 jnc SHORT . ReturnWithSuccess141 jnc SHORT .DoNotSetChsFlag 142 142 or BYTE [di+EDRIVE_INFO.wFlags], FLG_CHS_INFORMATION_IS_VALID 143 143 144 ; We store something to P-CHS anyway since some HW detection programs 145 ; ignore the CHS flag. And we should at least clear the variables anyway 146 ; since the same buffer is used for all drives so it contains parameters 147 ; from previously scanned drive. 148 .DoNotSetChsFlag: 144 149 eMOVZX dx, BYTE [es:si+DPT.bPchsHeads] 145 150 mov [di+EDRIVE_INFO.dwHeads], dx -
trunk/XTIDE_Universal_BIOS/Src/Initialization/DetectDrives.asm
r528 r545 158 158 ;-------------------------------------------------------------------- 159 159 StartDetectionWithDriveSelectByteInBHandStringInCX: 160 %ifdef MODULE_8BIT_IDE_ADVANCED 161 ; Autodetect port for XT-CF 160 %ifdef MODULE_8BIT_IDE 162 161 call DetectDrives_DoesIdevarsInCSBPbelongToXTCF 163 jne SHORT .S kipXTCFportDetection162 jne SHORT .ShouldNotSkipSlaveDriveDetection 164 163 165 164 ; XT-CF do not support slave drives so skip detection 166 165 test bh, FLG_DRVNHEAD_DRV 167 166 jnz SHORT NoSlaveDriveAvailable 168 169 ; XT-CF do not support slave drives so we can safely update port 170 ; for next drive (another XT-CF card on same system) 171 .DetectNextPort: 172 mov dx, [es:BOOTVARS.wNextXTCFportToScan] 173 xor dl, 40h 174 jnz SHORT .StoreNextXTCFportToScan 175 inc dh 176 cmp dh, XTCF_BASE_PORT_4 >> 8 177 ja SHORT .SkipXTCFportDetection ; XT-CF not found from any port 178 .StoreNextXTCFportToScan: 179 mov [es:BOOTVARS.wNextXTCFportToScan], dx 180 181 call AH1Eh_DetectXTCFwithBasePortInDX 182 jc SHORT .DetectNextPort ; XT-CF not found from this port 183 184 ; We now have autodetected port in DX 185 push dx 186 xchg ax, dx ; Port to print in AX 187 call DetectPrint_StartDetectWithAutodetectedBasePortInAXandIdeVarsInCSBP 188 jmp SHORT .DriveDetectionStringPrintedOnScreen 189 190 ; Print detect string for devices that do not support autodetection 191 .SkipXTCFportDetection: 192 push dx 193 %endif ; MODULE_8BIT_IDE_ADVANCED 167 .ShouldNotSkipSlaveDriveDetection: 168 %endif ; MODULE_8BIT_IDE 194 169 195 170 call DetectPrint_StartDetectWithMasterOrSlaveStringInCXandIdeVarsInCSBP … … 197 172 %ifdef MODULE_HOTKEYS 198 173 call HotkeyBar_UpdateDuringDriveDetection 199 %endif200 201 %ifdef MODULE_8BIT_IDE_ADVANCED202 pop dx203 174 %endif 204 175 ; Fall to .ReadAtaInfoFromHardDisk … … 278 249 279 250 280 %ifdef MODULE_8BIT_IDE _ADVANCED251 %ifdef MODULE_8BIT_IDE 281 252 ;-------------------------------------------------------------------- 282 253 ; DetectDrives_DoesIdevarsInCSBPbelongToXTCF … … 292 263 mov al, [cs:bp+IDEVARS.bDevice] 293 264 cmp al, DEVICE_8BIT_XTCF_PIO8 294 je SHORT .DeviceIsXTCF 265 je SHORT .Done 266 cmp al, DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD 267 268 %ifdef MODULE_8BIT_IDE_ADVANCED 269 je SHORT .Done 295 270 cmp al, DEVICE_8BIT_XTCF_DMA 296 je SHORT .DeviceIsXTCF 297 cmp al, DEVICE_8BIT_XTCF_MEMMAP 298 .D eviceIsXTCF:271 %endif ; MODULE_8BIT_IDE_ADVANCED 272 273 .Done: ; return state via ZF, set from the cmp instructions 299 274 NoSlaveDriveAvailable: 300 275 ret 301 %endif ; MODULE_8BIT_IDE _ADVANCED276 %endif ; MODULE_8BIT_IDE -
trunk/XTIDE_Universal_BIOS/Src/Main.asm
r541 r545 145 145 146 146 %ifdef MODULE_8BIT_IDE_ADVANCED 147 at ROMVARS.ideVars1+IDEVARS.bXTCFcontrolRegister, db XTCF_8BIT_PIO_MODE148 147 at ROMVARS.ideVars1+IDEVARS.bDevice, db DEVICE_8BIT_XTCF_PIO8 149 148 %endif -
trunk/XTIDE_Universal_BIOS/Src/VariablesAndDPTs/AccessDPT.asm
r542 r545 103 103 cmp ah, DEVICE_8BIT_XTCF_PIO8 104 104 je SHORT .DeviceIsXTCF 105 cmp ah, DEVICE_8BIT_XTCF_PIO8_WITH_BIU_OFFLOAD 106 je SHORT .DeviceIsXTCF 105 107 cmp ah, DEVICE_8BIT_XTCF_DMA 106 je SHORT .DeviceIsXTCF107 cmp ah, DEVICE_8BIT_XTCF_MEMMAP108 108 .DeviceIsXTCF: 109 109 ret -
trunk/XTIDE_Universal_BIOS/Src/VariablesAndDPTs/BootVars.asm
r528 r545 32 32 ;-------------------------------------------------------------------- 33 33 BootVars_Initialize: 34 %ifdef MODULE_8BIT_IDE_ADVANCED35 mov WORD [es:BOOTVARS.wNextXTCFportToScan], XTCF_BASE_PORT_DETECTION_SEED36 %endif37 38 34 ; Clear all DRVDETECTINFO structs to zero 39 35 mov al, DRVDETECTINFO_size -
trunk/XTIDE_Universal_BIOS/Src/VariablesAndDPTs/CreateDPT.asm
r544 r545 122 122 123 123 %ifdef MODULE_EBIOS 124 %ifdef CREATE_COMPATIBLE_DPT125 124 ; Store P-Cylinders here for Compatible DPTs when FLGL_DPT_LBA is not set 126 125 ; or when drive has over 15,482,880 sectors 127 126 mov [di+DPT.wPchsCylinders], ax 128 %endif129 127 test cl, FLGL_DPT_LBA 130 128 jz SHORT .NoLbaSoNoEBIOS … … 263 261 CreateDPT_StoreIdevarsOffsetAndBasePortFromCSBPtoDPTinDSDI: 264 262 mov [di+DPT.bIdevarsOffset], bp ; IDEVARS must start in first 256 bytes of ROM 265 266 %ifdef MODULE_8BIT_IDE_ADVANCED267 call DetectDrives_DoesIdevarsInCSBPbelongToXTCF268 jne SHORT .DeviceUsesPortSpecifiedInIDEVARS269 mov [di+DPT.wBasePort], dx270 ret271 .DeviceUsesPortSpecifiedInIDEVARS:272 %endif ; MODULE_8BIT_IDE_ADVANCED273 274 263 mov ax, [cs:bp+IDEVARS.wBasePort] 275 264 mov [di+DPT.wBasePort], ax -
trunk/XTIDE_Universal_BIOS/makefile
r543 r545 105 105 DEFINES_XT = $(DEFINES_COMMON) ELIMINATE_CGA_SNOW MODULE_8BIT_IDE_ADVANCED 106 106 DEFINES_XTPLUS = $(DEFINES_COMMON) $(DEFINES_XT) USE_186 107 DEFINES_AT = $(DEFINES_COMMON) USE_AT USE_286 MODULE_IRQ MODULE_ADVANCED_ATA 107 DEFINES_AT = $(DEFINES_COMMON) USE_AT USE_286 MODULE_IRQ MODULE_ADVANCED_ATA CREATE_COMPATIBLE_DPT 108 108 109 109 DEFINES_XT_LARGE = $(DEFINES_XT) $(DEFINES_COMMON_LARGE)
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