[150] | 1 | ; Project name : XTIDE Universal BIOS |
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[473] | 2 | ; Description : IDE Register I/O functions when supporting 8-bit |
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| 3 | ; devices that need address translations. |
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[150] | 4 | |
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[376] | 5 | ; |
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[412] | 6 | ; XTIDE Universal BIOS and Associated Tools |
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[376] | 7 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. |
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| 8 | ; |
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| 9 | ; This program is free software; you can redistribute it and/or modify |
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| 10 | ; it under the terms of the GNU General Public License as published by |
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| 11 | ; the Free Software Foundation; either version 2 of the License, or |
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| 12 | ; (at your option) any later version. |
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[412] | 13 | ; |
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[376] | 14 | ; This program is distributed in the hope that it will be useful, |
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| 15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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[412] | 17 | ; GNU General Public License for more details. |
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[376] | 18 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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[412] | 19 | ; |
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[376] | 20 | |
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[150] | 21 | ; Section containing code |
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| 22 | SECTION .text |
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| 23 | |
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| 24 | ;-------------------------------------------------------------------- |
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[473] | 25 | ; IdeIO_InputStatusRegisterToAL |
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[150] | 26 | ; Parameters: |
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[160] | 27 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 28 | ; Returns: |
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[473] | 29 | ; AL: IDE Status Register contents |
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[150] | 30 | ; Corrupts registers: |
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[160] | 31 | ; BX, DX |
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[150] | 32 | ;-------------------------------------------------------------------- |
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[473] | 33 | ALIGN JUMP_ALIGN |
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| 34 | IdeIO_InputStatusRegisterToAL: |
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| 35 | %ifndef MODULE_8BIT_IDE |
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| 36 | INPUT_TO_AL_FROM_IDE_REGISTER STATUS_REGISTER_in |
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| 37 | ret |
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[400] | 38 | |
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[473] | 39 | %else |
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| 40 | mov dl, STATUS_REGISTER_in |
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| 41 | ; Fall to IdeIO_InputToALfromIdeRegisterInDL |
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[332] | 42 | |
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[400] | 43 | ;-------------------------------------------------------------------- |
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[473] | 44 | ; IdeIO_InputToALfromIdeRegisterInDL |
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[400] | 45 | ; Parameters: |
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[473] | 46 | ; DL: IDE Register |
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[400] | 47 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 48 | ; Returns: |
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[473] | 49 | ; AL: Inputted byte |
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[400] | 50 | ; Corrupts registers: |
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| 51 | ; BX, DX |
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| 52 | ;-------------------------------------------------------------------- |
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[473] | 53 | IdeIO_InputToALfromIdeRegisterInDL: |
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| 54 | xor dh, dh ; IDE Register index now in DX |
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[491] | 55 | mov bx, dx ; and BX |
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[473] | 56 | mov al, [di+DPT_ATA.bDevice] |
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| 57 | cmp al, DEVICE_8BIT_XTIDE_REV2 |
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| 58 | je SHORT .ReverseA0andA3fromRegisterIndexInDX |
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| 59 | jb SHORT .InputToALfromRegisterInDX ; Standard IDE controllers and XTIDE rev 1 |
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[493] | 60 | |
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| 61 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[473] | 62 | cmp al, DEVICE_8BIT_JRIDE_ISA |
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| 63 | jne SHORT .ShlRegisterIndexInDX ; All XT-CF modes |
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| 64 | ; Fall to .InputToALfromMemoryMappedRegisterInDX |
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| 65 | |
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| 66 | .InputToALfromMemoryMappedRegisterInDX: |
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| 67 | push ds |
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| 68 | mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA |
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[491] | 69 | mov al, [bx+JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET] |
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[473] | 70 | pop ds |
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[150] | 71 | ret |
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[493] | 72 | %endif |
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| 73 | |
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[473] | 74 | .ReverseA0andA3fromRegisterIndexInDX: |
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| 75 | mov dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex] |
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| 76 | SKIP2B bx ; Skip shl dx, 1 |
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[150] | 77 | |
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[473] | 78 | .ShlRegisterIndexInDX: |
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[491] | 79 | eSHL_IM dx, 1 |
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[473] | 80 | ; Fall to .InputToALfromRegisterInDX |
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[400] | 81 | |
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[473] | 82 | .InputToALfromRegisterInDX: |
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| 83 | add dx, [di+DPT.wBasePort] |
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| 84 | in al, dx |
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| 85 | ret |
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| 86 | |
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| 87 | |
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[400] | 88 | ;-------------------------------------------------------------------- |
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[473] | 89 | ; IdeIO_OutputALtoIdeControlBlockRegisterInDL |
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[150] | 90 | ; Parameters: |
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[473] | 91 | ; AL: Byte to output |
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| 92 | ; DL: IDE Control Block Register |
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[160] | 93 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 94 | ; Returns: |
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[473] | 95 | ; Nothing |
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[150] | 96 | ; Corrupts registers: |
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[160] | 97 | ; BX, DX |
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[150] | 98 | ;-------------------------------------------------------------------- |
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[473] | 99 | IdeIO_OutputALtoIdeControlBlockRegisterInDL: |
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| 100 | ; Note! We do not need to reverse A0 and A3 for XTIDE rev 2 since |
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| 101 | ; the only Control Block Register we access is DEVICE_CONTROL_REGISTER_out |
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| 102 | ; at offset 6 (0110b). |
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| 103 | xor dh, dh ; IDE Register index now in DX |
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[160] | 104 | |
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[473] | 105 | mov bl, [di+DPT_ATA.bDevice] |
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| 106 | cmp bl, DEVICE_8BIT_XTIDE_REV2 |
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| 107 | jbe SHORT .OutputALtoControlBlockRegisterInDX ; Standard IDE controllers and XTIDE rev 1 |
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[493] | 108 | |
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| 109 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[473] | 110 | cmp bl, DEVICE_8BIT_JRIDE_ISA |
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| 111 | jne SHORT .ShlRegisterIndexInDX ; All XT-CF modes |
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| 112 | ; Fall to .OutputALtoMemoryMappedRegisterInDX |
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[160] | 113 | |
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[473] | 114 | .OutputALtoMemoryMappedRegisterInDX: |
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| 115 | mov bx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET |
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| 116 | jmp SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX |
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| 117 | |
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| 118 | .ShlRegisterIndexInDX: |
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| 119 | add dl, OFFSET_TO_CONTROL_BLOCK_REGISTERS |
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[491] | 120 | eSHL_IM dx, 1 |
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[473] | 121 | jmp SHORT OutputALtoRegisterInDX |
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[493] | 122 | %endif |
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[473] | 123 | |
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| 124 | .OutputALtoControlBlockRegisterInDX: |
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| 125 | call AccessDPT_GetIdevarsToCSBX |
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| 126 | add dx, [cs:bx+IDEVARS.wControlBlockPort] |
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| 127 | jmp SHORT OutputALtoPortInDX |
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| 128 | |
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| 129 | |
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[160] | 130 | ;-------------------------------------------------------------------- |
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[473] | 131 | ; IdeIO_OutputALtoIdeRegisterInDL |
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[160] | 132 | ; Parameters: |
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[473] | 133 | ; AL: Byte to output |
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| 134 | ; DL: IDE Command Block Register |
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[160] | 135 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 136 | ; Returns: |
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[473] | 137 | ; Nothing |
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[160] | 138 | ; Corrupts registers: |
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[473] | 139 | ; BX, DX |
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[160] | 140 | ;-------------------------------------------------------------------- |
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| 141 | ALIGN JUMP_ALIGN |
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[473] | 142 | IdeIO_OutputALtoIdeRegisterInDL: |
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| 143 | xor dh, dh ; IDE Register index now in DX |
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[160] | 144 | |
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[473] | 145 | mov bl, [di+DPT_ATA.bDevice] |
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| 146 | cmp bl, DEVICE_8BIT_XTIDE_REV2 |
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| 147 | je SHORT .ReverseA0andA3fromRegisterIndexInDX |
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| 148 | jb SHORT OutputALtoRegisterInDX ; Standard IDE controllers and XTIDE rev 1 |
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[493] | 149 | |
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| 150 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[473] | 151 | cmp bl, DEVICE_8BIT_JRIDE_ISA |
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| 152 | jne SHORT .ShlRegisterIndexInDX ; All XT-CF modes |
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| 153 | ; Fall to .OutputALtoMemoryMappedRegisterInDX |
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[400] | 154 | |
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[473] | 155 | .OutputALtoMemoryMappedRegisterInDX: |
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| 156 | mov bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET |
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| 157 | .OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX: |
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| 158 | add bx, dx |
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| 159 | push ds |
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| 160 | mov ds, [di+DPT.wBasePort] ; Segment for JR-IDE/ISA |
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| 161 | mov [bx], al |
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| 162 | pop ds |
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[160] | 163 | ret |
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[493] | 164 | %endif |
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| 165 | |
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[473] | 166 | .ReverseA0andA3fromRegisterIndexInDX: |
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| 167 | mov bx, dx |
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| 168 | mov dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex] |
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| 169 | SKIP2B bx ; Skip shl dx, 1 |
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| 170 | |
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| 171 | .ShlRegisterIndexInDX: |
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[491] | 172 | eSHL_IM dx, 1 |
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[473] | 173 | ; Fall to OutputALtoRegisterInDX |
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| 174 | |
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| 175 | ALIGN JUMP_ALIGN |
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| 176 | OutputALtoRegisterInDX: |
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| 177 | add dx, [di+DPT.wBasePort] |
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| 178 | OutputALtoPortInDX: |
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| 179 | out dx, al |
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[400] | 180 | ret |
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| 181 | |
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[473] | 182 | |
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| 183 | |
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| 184 | ; A0 <-> A3 lookup table |
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| 185 | g_rgbSwapA0andA3fromIdeRegisterIndex: |
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| 186 | db 0000b ; <-> 0000b, 0 |
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| 187 | db 1000b ; <-> 0001b, 1 |
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| 188 | db 0010b ; <-> 0010b, 2 |
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| 189 | db 1010b ; <-> 0011b, 3 |
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| 190 | db 0100b ; <-> 0100b, 4 |
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| 191 | db 1100b ; <-> 0101b, 5 |
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| 192 | db 0110b ; <-> 0110b, 6 |
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| 193 | db 1110b ; <-> 0111b, 7 |
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| 194 | |
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| 195 | %endif ; MODULE_8BIT_IDE |
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