Changeset 160 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm


Ignore:
Timestamp:
May 4, 2011, 5:49:22 PM (13 years ago)
Author:
aitotat
google:author:
aitotat
Message:

Changes to XTIDE Universal BIOS:

  • Support for XTIDE mod now works.
File:
1 edited

Legend:

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Added
Removed

  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm

    r150 r160  
    66
    77;--------------------------------------------------------------------
    8 ; IdeIO_OutputALtoIdeRegisterInDX
     8; IdeIO_OutputALtoIdeRegisterInDL
    99;   Parameters:
    1010;       AL:     Byte to output
    11 ;       DX:     IDE Register
    12 ;       CS:BX:  Ptr to IDEVARS
     11;       DL:     IDE Register
     12;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    1313;   Returns:
    1414;       Nothing
    1515;   Corrupts registers:
    16 ;       DX
     16;       BX, DX
    1717;--------------------------------------------------------------------
    1818ALIGN JUMP_ALIGN
    19 IdeIO_OutputALtoIdeRegisterInDX:
    20     add     dx, [cs:bx+IDEVARS.wPort]
     19IdeIO_OutputALtoIdeRegisterInDL:
     20    mov     bx, IDEVARS.wPort
     21    call    GetPortToDXandTranslateA0andA3ifNecessary
    2122    out     dx, al
    2223    ret
    … …  
    2425
    2526;--------------------------------------------------------------------
    26 ; IdeIO_OutputALtoIdeControlBlockRegisterInDX
     27; IdeIO_OutputALtoIdeControlBlockRegisterInDL
    2728;   Parameters:
    2829;       AL:     Byte to output
    29 ;       DX:     IDE Control Block Register
    30 ;       CS:BX:  Ptr to IDEVARS
     30;       DL:     IDE Control Block Register
     31;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    3132;   Returns:
    3233;       Nothing
    3334;   Corrupts registers:
    34 ;       DX
     35;       BX, DX
    3536;--------------------------------------------------------------------
    3637ALIGN JUMP_ALIGN
    37 IdeIO_OutputALtoIdeControlBlockRegisterInDX:
    38     add     dx, [cs:bx+IDEVARS.wPortCtrl]
     38IdeIO_OutputALtoIdeControlBlockRegisterInDL:
     39    mov     bx, IDEVARS.wPortCtrl
     40    call    GetPortToDXandTranslateA0andA3ifNecessary
    3941    out     dx, al
    4042    ret
    … …  
    4244
    4345;--------------------------------------------------------------------
    44 ; IdeIO_InputToALfromIdeRegisterInDX
     46; IdeIO_InputToALfromIdeRegisterInDL
    4547;   Parameters:
    46 ;       DX:     IDE Register
    47 ;       CS:BX:  Ptr to IDEVARS
     48;       DL:     IDE Register
     49;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    4850;   Returns:
    4951;       AL:     Inputted byte
    5052;   Corrupts registers:
    51 ;       DX
     53;       BX, DX
    5254;--------------------------------------------------------------------
    5355ALIGN JUMP_ALIGN
    54 IdeIO_InputToALfromIdeRegisterInDX:
    55     add     dx, [cs:bx+IDEVARS.wPort]
     56IdeIO_InputToALfromIdeRegisterInDL:
     57    mov     bx, IDEVARS.wPort
     58    call    GetPortToDXandTranslateA0andA3ifNecessary
    5659    in      al, dx
    5760    ret
     61
     62
     63;--------------------------------------------------------------------
     64; GetPortToDXandTranslateA0andA3ifNecessary
     65;   Parameters:
     66;       BX:     Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl)
     67;       DL:     IDE Register
     68;       DS:DI:  Ptr to DPT (in RAMVARS segment)
     69;   Returns:
     70;       DX:     Source/Destination Port
     71;   Corrupts registers:
     72;       BX
     73;--------------------------------------------------------------------
     74ALIGN JUMP_ALIGN
     75GetPortToDXandTranslateA0andA3ifNecessary:
     76    xor     dh, dh                          ; DX now has IDE register offset
     77    add     bl, [di+DPT.bIdevarsOffset]     ; CS:BX now points port address
     78    add     dx, [cs:bx]
     79    test    BYTE [di+DPT.bFlagsHigh], FLGH_DPT_REVERSED_A0_AND_A3
     80    jz      SHORT .ReturnPortInDX
     81
     82    ; Exchange address lines A0 and A3 from DL
     83    mov     bl, dl
     84    mov     bh, MASK_A3_AND_A0_ADDRESS_LINES
     85    and     bh, bl                          ; BH = 0, 1, 8 or 9, we can ignore 0 and 9
     86    jz      SHORT .ReturnPortInDX           ; Jump out since DH is 0
     87    xor     bh, MASK_A3_AND_A0_ADDRESS_LINES
     88    jz      SHORT .ReturnPortInDX           ; Jump out since DH was 9
     89    and     dl, ~MASK_A3_AND_A0_ADDRESS_LINES
     90    or      dl, bh                          ; Address lines now reversed
     91.ReturnPortInDX:
     92    ret
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