Changeset 370 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS


Ignore:
Timestamp:
Mar 29, 2012, 4:40:50 PM (12 years ago)
Author:
krille_n_@…
google:author:
krille_n_@hotmail.com
Message:

Changes:

  • Added some missing PIO mode timings to ATA_ID.inc (based on info from http://www.singlix.net/specs/cfspc4_0.pdf)
  • Updated Configuration_FullMode.txt but it may need additional changes as the Tandy info doesn't match the wiki.
  • Optimizations.
  • Excluded some unused code from XTIDECFG.
Location:
trunk/XTIDE_Universal_BIOS
Files:
10 edited

Legend:

Unmodified
Added
Removed
  • trunk/XTIDE_Universal_BIOS/Inc/ATA_ID.inc

    r364 r370  
    2121PIO_3_MIN_ADDRESS_VALID_NS  EQU     30
    2222PIO_4_MIN_ADDRESS_VALID_NS  EQU     25
    23 PIO_5_MIN_ADDRESS_VALID_NS  EQU     25      ; Could not find info
    24 PIO_6_MIN_ADDRESS_VALID_NS  EQU     25      ; Could not find info
     23PIO_5_MIN_ADDRESS_VALID_NS  EQU     15
     24PIO_6_MIN_ADDRESS_VALID_NS  EQU     10
    2525
    2626; PIO Minimum Active Times (t2)
     
    3030PIO_3_MIN_ACTIVE_TIME_NS    EQU     80
    3131PIO_4_MIN_ACTIVE_TIME_NS    EQU     70
    32 PIO_5_MIN_ACTIVE_TIME_NS    EQU     70      ; Could not find info
    33 PIO_6_MIN_ACTIVE_TIME_NS    EQU     70      ; Could not find info
     32PIO_5_MIN_ACTIVE_TIME_NS    EQU     65
     33PIO_6_MIN_ACTIVE_TIME_NS    EQU     55
    3434
    3535; PIO Minimum Recovery Times or Inactive Times (t2i) can be calculated
    36 ; from Minimum Cycle Time (t0) - Minimum Active Time (t2) - Address Valid Time (t1). 
     36; from Minimum Cycle Time (t0) - Minimum Active Time (t2) - Address Valid Time (t1).
    3737; I'm not sure about this calculation so correct me if I'm wrong!
    3838; Recovery time should be calculated at run time since Cycle Time t0 can be
     
    5454    .wBpTrck    resw 1  ; 4F, Number of unformatted bytes per track
    5555    .wBpSect    resw 1  ; 5F, Number of unformatted bytes per sector
    56     .wSPT       resw 1  ; 6F, Number of sectors per track 
     56    .wSPT       resw 1  ; 6F, Number of sectors per track
    5757                resw 3  ; 7...9X
    5858    .strSerial  resb 20 ; 10...19F, Serial number (20 ASCII characters, 0000h=not specified)
     
    136136                resw 1  ; 4X
    137137                resw 1  ; 5X
    138     .wSPT       resw 1  ; 6F, Number of logical sectors per track 
     138    .wSPT       resw 1  ; 6F, Number of logical sectors per track
    139139                resw 3  ; 7...9X
    140140    .strSerial  resb 20 ; 10...19F, Serial number (20 ASCII characters, 0000h=not specified)
     
    166166    .bBlockSel  resb 1  ; 59[0-7]V, Current setting for number of sectors that
    167167                        ;           can be transferred per interrupt on R/W multiple command
    168     .bBlockFlgs resb 1  ; 59[8-15]VR, bit 0 set if Multiple sector setting is valid 
     168    .bBlockFlgs resb 1  ; 59[8-15]VR, bit 0 set if Multiple sector setting is valid
    169169    .dwLBACnt   resd 1  ; 60...61F, Total number of user addressable sectors (LBA mode only)
    170170    .bSDMASupp  resb 1  ; 62[0-7]F, Single word DMA transfer modes supported
     
    172172    .bMDMASupp  resb 1  ; 63[0-7]F, Multiword DMA transfer modes supported
    173173    .bMDMAAct   resb 1  ; 63[8-15]V, Multiword DMA transfer mode active
    174    
     174
    175175    ; Words 64-70 are valid only if bit1 is set in .wFields (ATA2+)
    176176    .bPIOSupp   resb 1  ; 64[0-7]F, Advanced PIO Transfer Modes Supported
     
    220220                resw 1  ; 4X
    221221                resw 1  ; 5X
    222                 resw 1  ; 6X, Obsolete (Number of logical sectors per track) 
     222                resw 1  ; 6X, Obsolete (Number of logical sectors per track)
    223223                resw 2  ; 7...8V, Reserved for assignment by the CompactFlash Association
    224224                resw 1  ; 9X
  • trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc

    r365 r370  
    9191struc DPT_SERIAL
    9292    .dpt                        resb    DPT_size
    93 
    9493    .wSerialPortAndBaud:
    9594    .bSerialPort                resb    1   ; Serial connection I/O port address, divided by 4
     
    126125    jnz     SHORT %%LoadMaxValueToAX
    127126    cmp     ax, MAX_LCHS_CYLINDERS
    128     jbe     SHORT %%NoNeedToModify
     127    jb      SHORT %%NoNeedToModify
    129128%%LoadMaxValueToAX:
    130129    mov     ax, MAX_LCHS_CYLINDERS
  • trunk/XTIDE_Universal_BIOS/Inc/IDE_8bit.inc

    r363 r370  
    3030; XTIDE_INSW
    3131;   Parameters:
    32 ;       BX:     Bit mask for toggling XTIDE data low/high reg
     32;       BL:     Bit mask for toggling XTIDE data low/high reg
    3333;       DX:     XTIDE Data Low Register address
    3434;       ES:DI:  Ptr to destination buffer
     
    4141%ifdef USE_186  ; INS instruction available
    4242    insb                        ; Load low byte from port DX to [ES:DI]
    43     xor     dx, bx              ; IDE Data Reg to XTIDE Data High Reg
     43    xor     dl, bl              ; IDE Data Reg to XTIDE Data High Reg
    4444    insb                        ; Load high byte from port DX to [ES:DI]
    45     xor     dx, bx              ; Restore to IDE Data Register
     45    xor     dl, bl              ; Restore to IDE Data Register
    4646%else   ; If 8088/8086
    4747    in      al, dx              ; Load low byte from port
    48     xor     dx, bx              ; IDE Data Reg to XTIDE Data High Reg
     48    xor     dl, bl              ; IDE Data Reg to XTIDE Data High Reg
    4949    stosb                       ; Store byte to [ES:DI]
    5050    in      al, dx              ; Load high byte from port
    51     xor     dx, bx              ; Restore to IDE Data Register
     51    xor     dl, bl              ; Restore to IDE Data Register
    5252    stosb                       ; Store byte to [ES:DI]
    5353%endif
     
    6060; XTIDE_OUTSW
    6161;   Parameters:
    62 ;       BX:     Bit mask for toggling XTIDE data low/high reg
     62;       BL:     Bit mask for toggling XTIDE data low/high reg
    6363;       DX:     XTIDE Data Low Register address
    6464;       DS:SI:  Ptr to source buffer
     
    7171%ifdef USE_186  ; OUTS instruction available
    7272    lodsb                       ; Load low byte from [DS:SI] to AL
    73     xor     dx, bx              ; IDE Data Reg to XTIDE Data High Reg
     73    xor     dl, bl              ; IDE Data Reg to XTIDE Data High Reg
    7474    outsb                       ; Output high byte from [DS:SI]
    75     xor     dx, bx              ; XTIDE Data High Reg to Data Low Reg
     75    xor     dl, bl              ; XTIDE Data High Reg to Data Low Reg
    7676    out     dx, al              ; Output low byte from AL
    7777%else   ; If 8088/8086
    7878    lodsw                       ; Load word from [DS:SI]
    79     xor     dx, bx              ; IDE Data Reg to XTIDE Data High Reg
     79    xor     dl, bl              ; IDE Data Reg to XTIDE Data High Reg
    8080    xchg    al, ah              ; => AL=high byte, AH=low byte
    8181    out     dx, al              ; Output high byte
    82     xor     dx, bx              ; XTIDE Data High Reg to Data Low Reg
     82    xor     dl, bl              ; XTIDE Data High Reg to Data Low Reg
    8383    mov     al, ah              ; Copy low byte to AL
    8484    out     dx, al              ; Output low byte
  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeTransfer.asm

    r365 r370  
    102102    ; Return number of successfully read sectors
    103103ReturnWithTransferErrorInAH:
     104%ifdef USE_386
     105    movzx   cx, [bp+PIOVARS.bSectorsDone]
     106%else
    104107    mov     cl, [bp+PIOVARS.bSectorsDone]
    105108    mov     ch, 0                               ; Preserve CF
     109%endif
    106110    ret
    107111
     
    180184    ; Store sizes
    181185    mov     [bp+PIOVARS.bSectorsLeft], ah
    182     eMOVZX  ax, BYTE [di+DPT_ATA.bBlockSize]
     186    eMOVZX  ax, [di+DPT_ATA.bBlockSize]
    183187    mov     [bp+PIOVARS.wSectorsInBlock], ax
    184188    mov     [bp+PIOVARS.bSectorsDone], ah       ; Zero
     
    218222ReadBlockFromXtideRev1:
    219223    UNROLL_SECTORS_IN_CX_TO_QWORDS
    220     mov     bx, 8       ; Bit mask for toggling data low/high reg
     224    mov     bl, 8       ; Bit mask for toggling data low/high reg
    221225ALIGN JUMP_ALIGN
    222226.InswLoop:
     
    287291    push    bx
    288292    UNROLL_SECTORS_IN_CX_TO_QWORDS
    289     mov     bx, 8       ; Bit mask for toggling data low/high reg
     293    mov     bl, 8       ; Bit mask for toggling data low/high reg
    290294    push    es          ; Copy ES...
    291295    pop     ds          ; ...to DS
  • trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH9h_HInit.asm

    r365 r370  
    227227;               Set if error flag was set
    228228;   Corrupts registers:
    229 ;       BX, ES
     229;       Nothing
    230230;--------------------------------------------------------------------
    231231SetErrorFlagFromALwithErrorCodeInAH:
  • trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AHDh_HReset.asm

    r369 r370  
    5252
    5353    ; Initialize Master and Slave drives
    54     eMOVZX  ax, BYTE [di+DPT.bIdevarsOffset]    ; (AL) pointer to controller we are looking to reset
     54    eMOVZX  ax, [di+DPT.bIdevarsOffset]         ; (AL) pointer to controller we are looking to reset
    5555                                                ; (AH) initialize error code, assume success
    5656
     
    8585IterateAndResetDrives:
    8686    cmp     al, [di+DPT.bIdevarsOffset]         ; The right controller?
    87     jne     .done
     87    jne     .Done
     88    push    cx
    8889    push    ax
    89     push    cx
    9090    call    AH9h_InitializeDriveForUse          ; Reset Master and Slave (Master will come first in DPT list)
    9191
    9292%ifdef MODULE_ADVANCED_ATA
    9393    jc      SHORT .SkipControllerInitSinceError
    94     call    InitializeAdvancedIdeControllers    ; Done after drive init so drives are first set to advanced PIO mode, then the controller
     94    ; Here we initialize the more advanced controllers (VLB and PCI) to get better performance for systems with 32-bit bus.
     95    ; This step is optional since the controllers use slowest possible settings by default if they are not initialized.
     96
     97    pop     ax
     98    push    ax
     99    cmp     al, [di+LARGEST_DPT_SIZE+DPT.bIdevarsOffset]    ; We check if next DPT is for the same IDE controller.
     100    je      SHORT .SkipInitializationUntilNextDrive         ; If it is, we skip the initialization.
     101    call    AdvAtaInit_InitializeControllerForDPTinDSDI     ; Done after drive init so drives are first set to advanced PIO mode, then the controller
     102.SkipInitializationUntilNextDrive:
    95103.SkipControllerInitSinceError:
    96 %endif
     104%endif  ; MODULE_ADVANCED_ATA
    97105
     106    pop     ax
    98107    pop     cx
    99     pop     ax
    100     jnc     .done
     108    jnc     .Done
    101109    or      ah, (RET_HD_RESETFAIL << 1) | 1     ; OR in Reset Failed error code and CF, will SHR into position later
    102 .done:
     110.Done:
    103111    stc                                         ; From IterateAllDPTs perspective, the DPT is never found (continue iteration)
    104112    ret
    105113
    106 
    107 %ifdef MODULE_ADVANCED_ATA
    108 ;--------------------------------------------------------------------
    109 ; Here we initialize the more advanced controllers (VLB and PCI)
    110 ; to get better performance for systems with 32-bit bus.
    111 ;
    112 ; This step is optional since the controllers use slowest possible
    113 ; settings by default if they are not initialized.
    114 ;
    115 ; InitializeAdvancedIdeController
    116 ;   Parameters:
    117 ;       DS:DI:  Ptr to DPT
    118 ;   Returns:
    119 ;       CF:     Cleared if success or no controller to initialize
    120 ;               Set if error
    121 ;   Corrupts registers:
    122 ;       AX, BX, CX, DX
    123 ;--------------------------------------------------------------------
    124 InitializeAdvancedIdeControllers:
    125     ; We want to initialize the advanced controller only after both
    126     ; Master and Slave drive are initialized to correct PIO mode.
    127     ; We check if next DPT is for the same IDE controller. If it is,
    128     ; we skip the initialization.
    129     mov     al, [di+DPT.bIdevarsOffset]
    130     cmp     al, [di++LARGEST_DPT_SIZE+DPT.bIdevarsOffset]
    131     je      SHORT .SkipInitializationUntilNextDrive ; CF cleared
    132 
    133     jmp     AdvAtaInit_InitializeControllerForDPTinDSDI
    134 .SkipInitializationUntilNextDrive:
    135     clc
    136     ret
    137 
    138 %endif  ; MODULE_ADVANCED_ATA
  • trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvAtaInit.asm

    r364 r370  
    114114;--------------------------------------------------------------------
    115115AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI:
    116     eMOVZX  bx, BYTE [di+DPT_ADVANCED_ATA.bPioMode]
     116    eMOVZX  bx, [di+DPT_ADVANCED_ATA.bPioMode]
    117117    mov     cx, [di+DPT_ADVANCED_ATA.wMinPioCycleTime]
    118118    test    si, si
  • trunk/XTIDE_Universal_BIOS/Src/Initialization/AtaID.asm

    r364 r370  
    8989    ; Get PIO mode and cycle time for PIO 0...2
    9090    mov     bx, [es:si+ATA1.bPioMode]
     91    mov     ax, bx                  ; AH = 0, AL = PIO mode 0, 1 or 2
    9192    shl     bx, 1                   ; Shift for WORD lookup
    9293    mov     cx, [cs:bx+.rgwPio0to2CycleTimeInNanosecs]
    93     shr     bx, 1
    94     xchg    ax, bx                  ; AH = 0, AL = PIO mode 0, 1 or 2
    9594
    9695    ; Check if IORDY is supported
     
    105104    ; Get Advanced PIO mode
    106105    ; (Hard Disks supports up to 4 but CF cards can support 5 and 6)
    107     mov     bx, [es:si+ATA2.bPIOSupp]
     106    mov     bl, [es:si+ATA2.bPIOSupp]
    108107.CheckNextFlag:
    109108    inc     ax
    110     shr     bx, 1
     109    shr     bl, 1
    111110    jnz     SHORT .CheckNextFlag
    112111    MIN_U   al, 6                       ; Make sure not above lookup tables
  • trunk/XTIDE_Universal_BIOS/Src/Initialization/Vision.asm

    r364 r370  
    4545IsConfigRegisterWithIDinAL:
    4646    mov     ah, al
    47     and     ah, MASK_QDCONFIG_CONTROLLER_ID
    48     cmp     ah, ID_QD6500 << 4
     47    and     al, MASK_QDCONFIG_CONTROLLER_ID
     48    cmp     al, ID_QD6500 << 4
    4949    je      SHORT VisionControllerDetected
    50     cmp     ah, ID_QD6580 << 4
     50    cmp     al, ID_QD6580 << 4
    5151    je      SHORT VisionControllerDetected
    52     cmp     ah, ID_QD6580_ALTERNATE << 4
     52    cmp     al, ID_QD6580_ALTERNATE << 4
    5353VisionControllerDetected:
     54    xchg    ah, al
    5455    ret
    5556
     
    175176    mov     bp, QD6500_MAX_ACTIVE_TIME_CLOCKS | (QD6500_MIN_ACTIVE_TIME_CLOCKS << 8)
    176177
    177     ; We need the PIO Cycle Time in CX to calculate Active and Recovery Times. 
     178    ; We need the PIO Cycle Time in CX to calculate Active and Recovery Times.
    178179.CalculateTimingsForQD65xx:
    179180    call    AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI
  • trunk/XTIDE_Universal_BIOS/makefile

    r369 r370  
    196196
    197197xt_unused: xt
    198     $(AS) "$(SRC_ASM)" $(ASFLAGS) $(DEFS_XT) -o"$(TARGET)_xt_unused.asm" -E -DCHECK_FOR_UNUSED_ENTRYPOINTS
    199     perl ..\tools\unused.pl $(TARGET)_xt.lst $(TARGET)_xt_unused.asm
    200 
     198    @$(AS) "$(SRC_ASM)" $(ASFLAGS) $(DEFS_XT) -o"$(TARGET)_xt_unused.asm" -E -DCHECK_FOR_UNUSED_ENTRYPOINTS
     199    @perl ..\tools\unused.pl $(TARGET)_xt.lst $(TARGET)_xt_unused.asm
     200
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