Changeset 363 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc


Ignore:
Timestamp:
Mar 26, 2012, 4:20:43 PM (12 years ago)
Author:
aitotat@…
google:author:
aitotat@gmail.com
Message:

Changes to XTIDE Universal BIOS:

  • Added Advanced ATA Module (MODULE_ADVANCED_ATA) with native support for QDI Vision QD6500 and QD6580 VLB IDE Controllers.
  • Hopefully optimized IDE transfer functions for 8088 (replaced some memory accesses from WORD to BYTE).
  • XT build does not fit in 8k at the moment!!!
File:
1 edited

Legend:

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Added
Removed
  • trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc

    r358 r363  
    2525endstruc
    2626
    27 ; DPT for ATA devices
    28 struc DPT_ATA   ; 10 + 2 bytes = 12 bytes
    29     .dpt                        resb    DPT_size
    30 
    31     ; Block size is specified in sectors (1, 2, 4, 8, 16, 32, 64 or 128)
    32     .wSetAndMaxBlock:
    33     .bSetBlock                  resb    1   ; Current block size (at least 1)
    34     .bMaxBlock                  resb    1   ; Maximum block size, 0 = block mode not supported
    35 endstruc
    36 
    37 %ifdef MODULE_SERIAL
    38 ; DPT for Serial devices
    39 struc DPT_SERIAL
    40     .dpt                        resb    DPT_size
    41 
    42     .wSerialPortAndBaud:
    43     .bSerialPort                resb    1   ; Serial connection I/O port address, divided by 4
    44     .bSerialBaud                resb    1   ; Serial connection baud rate divisor
    45 endstruc
    46 %endif
    47 
    48 LARGEST_DPT_SIZE                EQU     DPT_ATA_size
    49 
    50 
    5127; Bit definitions for DPT.bFlagsLow
    5228MASKL_DPT_CHS_SHIFT_COUNT       EQU (7<<0)  ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4)
     
    6238%endif
    6339FLGH_DPT_INTERRUPT_IN_SERVICE   EQU (1<<3)  ; Set when waiting for IRQ
    64 FLGH_DPT_RESET_nDRDY            EQU (1<<4)  ; Drive ready to accept commands
    65 FLGH_DPT_RESET_nINITPRMS        EQU (1<<5)  ; Initialize Device Parameters successful
    66 FLGH_DPT_RESET_nRECALIBRATE     EQU (1<<6)  ; Recalibrate successful
    67 FLGH_DPT_RESET_nSETBLOCK        EQU (1<<7)  ; Initialize Block Mode successful
    68 MASKH_DPT_RESET                 EQU 0F0h
    6940
     41; IDE device only
     42FLGH_DPT_INITERROR              EQU (1<<7)
     43
     44; Serial device only
    7045FLGH_DPT_SERIAL_FLOPPY                      EQU (1<<4)
    7146FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK            EQU 0e0h
     
    7853ADDRESSING_MODE_LBA28           EQU     2   ; 28-bit LBA Addressing Mode
    7954ADDRESSING_MODE_LBA48           EQU     3   ; 48-bit LBA Addressing Mode
     55
     56
     57; DPT for ATA devices
     58struc DPT_ATA   ; 10 + 2 bytes = 12 bytes
     59    .dpt                        resb    DPT_size
     60
     61    ; Block size is specified in sectors (1, 2, 4, 8, 16, 32, 64 or 128)
     62    .wSetAndMaxBlock:
     63    .bSetBlock                  resb    1   ; Current block size (do not set to zero!)
     64    .bMaxBlock                  resb    1   ; Maximum block size, 0 = block mode not supported
     65
     66%ifdef MODULE_ADVANCED_ATA  ; +2 extra bytes = 14 bytes
     67    .bPioMode                   resb    1
     68    .bDevice                    resb    1
     69%endif
     70endstruc
     71
     72
     73%ifdef MODULE_ADVANCED_ATA
     74; Temporary extension for DPT_ATA. Contents will be copied to BOOTMENUINFO and
     75; then these variables will be overridden by next DPT.
     76struc DPT_ADVANCED_ATA
     77    .dpt_ata                resb    DPT_ATA_size
     78    .wIdeBasePort           resb    2   ; IDE Base Port
     79    .wMinPioActiveTimeNs    resb    2   ; Minimum PIO Active Time in ns
     80    .wMinPioRecoveryTimeNs  resb    2   ; Minimum PIO Recovery Time in ns
     81    .wControllerID          resb    2   ; Controller specific ID WORD
     82    .wControllerBasePort    resb    2   ; Advanced Controller port (not IDE port)
     83endstruc
     84%endif
     85
     86
     87%ifdef MODULE_SERIAL
     88; DPT for Serial devices
     89struc DPT_SERIAL
     90    .dpt                        resb    DPT_size
     91
     92    .wSerialPortAndBaud:
     93    .bSerialPort                resb    1   ; Serial connection I/O port address, divided by 4
     94    .bSerialBaud                resb    1   ; Serial connection baud rate divisor
     95endstruc
     96%endif
     97
     98
     99; This is the common size for all DPTs. All DPTs must be equal size.
     100LARGEST_DPT_SIZE                EQU     DPT_ATA_size
     101
    80102
    81103; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
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