source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc @ 363

Last change on this file since 363 was 363, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Added Advanced ATA Module (MODULE_ADVANCED_ATA) with native support for QDI Vision QD6500 and QD6580 VLB IDE Controllers.
  • Hopefully optimized IDE transfer functions for 8088 (replaced some memory accesses from WORD to BYTE).
  • XT build does not fit in 8k at the moment!!!
File size: 4.3 KB
Line 
1; Project name  :   XTIDE Universal BIOS
2; Description   :   Defines for DPT structs containing custom
3;                   Disk Parameter Table used by this BIOS.
4%ifndef CUSTOMDPT_INC
5%define CUSTOMDPT_INC
6
7; Base DPT for all device types
8struc DPT   ; 10 bytes
9    ; General Disk Parameter Table related
10    .wFlags:
11    .bFlagsLow                  resb    1
12    .bFlagsHigh                 resb    1
13    .bIdevarsOffset             resb    1   ; Offset to IDEVARS for this drive
14
15    ; IDE Drive related
16    ; .bLbaHeads and .twLbaSectors are used for LBA addressing only.
17    .bLbaHeads:                 resb    1   ; Number of LBA assisted heads (1...255)
18    .twLbaSectors               resb    2   ; 48-bit sector count for LBA addressing
19
20    ; .wPchsCylinders and .bPchsSectors are used for CHS addressing only.
21    .wPchsCylinders             resb    2   ; Number of P-CHS Cylinders (1...16383)
22    .wPchsHeadsAndSectors:
23    .bPchsHeads                 resb    1   ; Number of P-CHS heads (1...16)
24    .bPchsSectors               resb    1   ; Number of P-CHS Sectors per Track (1...63)
25endstruc
26
27; Bit definitions for DPT.bFlagsLow
28MASKL_DPT_CHS_SHIFT_COUNT       EQU (7<<0)  ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4)
29FLGL_DPT_SLAVE                  EQU FLG_DRVNHEAD_DRV    ; (1<<4), Drive is slave drive
30MASKL_DPT_ADDRESSING_MODE       EQU (3<<5)  ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA)
31FLGL_DPT_ENABLE_IRQ             EQU (1<<7)
32
33; Bit definitions for DPT.bFlagsHigh
34FLGH_DPT_REVERSED_A0_AND_A3     EQU (1<<0)  ; XTIDE mod, Address lines 0 and 3 reversed
35FLGH_DPT_BLOCK_MODE_SUPPORTED   EQU (1<<1)  ; Use block transfer commands (must be bit 1!)
36%ifdef MODULE_SERIAL
37FLGH_DPT_SERIAL_DEVICE          EQU (1<<2)  ; Serial Port Device
38%endif
39FLGH_DPT_INTERRUPT_IN_SERVICE   EQU (1<<3)  ; Set when waiting for IRQ
40
41; IDE device only
42FLGH_DPT_INITERROR              EQU (1<<7)
43
44; Serial device only
45FLGH_DPT_SERIAL_FLOPPY                      EQU (1<<4)
46FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK            EQU 0e0h
47FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION  EQU 5
48
49; Addressing modes for DPT.wFlags
50ADDRESSING_MODE_FIELD_POSITION  EQU     5
51ADDRESSING_MODE_LCHS            EQU     0   ; L-CHS Addressing Mode (NORMAL in many other BIOSes)
52ADDRESSING_MODE_PCHS            EQU     1   ; P-CHS Addressing Mode (LARGE in many other BIOSes)
53ADDRESSING_MODE_LBA28           EQU     2   ; 28-bit LBA Addressing Mode
54ADDRESSING_MODE_LBA48           EQU     3   ; 48-bit LBA Addressing Mode
55
56
57; DPT for ATA devices
58struc DPT_ATA   ; 10 + 2 bytes = 12 bytes
59    .dpt                        resb    DPT_size
60
61    ; Block size is specified in sectors (1, 2, 4, 8, 16, 32, 64 or 128)
62    .wSetAndMaxBlock:
63    .bSetBlock                  resb    1   ; Current block size (do not set to zero!)
64    .bMaxBlock                  resb    1   ; Maximum block size, 0 = block mode not supported
65
66%ifdef MODULE_ADVANCED_ATA  ; +2 extra bytes = 14 bytes
67    .bPioMode                   resb    1
68    .bDevice                    resb    1
69%endif
70endstruc
71
72
73%ifdef MODULE_ADVANCED_ATA
74; Temporary extension for DPT_ATA. Contents will be copied to BOOTMENUINFO and
75; then these variables will be overridden by next DPT.
76struc DPT_ADVANCED_ATA
77    .dpt_ata                resb    DPT_ATA_size
78    .wIdeBasePort           resb    2   ; IDE Base Port
79    .wMinPioActiveTimeNs    resb    2   ; Minimum PIO Active Time in ns
80    .wMinPioRecoveryTimeNs  resb    2   ; Minimum PIO Recovery Time in ns
81    .wControllerID          resb    2   ; Controller specific ID WORD
82    .wControllerBasePort    resb    2   ; Advanced Controller port (not IDE port)
83endstruc
84%endif
85
86
87%ifdef MODULE_SERIAL
88; DPT for Serial devices
89struc DPT_SERIAL
90    .dpt                        resb    DPT_size
91
92    .wSerialPortAndBaud:
93    .bSerialPort                resb    1   ; Serial connection I/O port address, divided by 4
94    .bSerialBaud                resb    1   ; Serial connection baud rate divisor
95endstruc
96%endif
97
98
99; This is the common size for all DPTs. All DPTs must be equal size.
100LARGEST_DPT_SIZE                EQU     DPT_ATA_size
101
102
103; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
104; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
105MAX_LCHS_CYLINDERS              EQU     1024
106LBA_ASSIST_SPT                  EQU     63
107
108
109;--------------------------------------------------------------------
110; LIMIT_LBA_CYLINDERS_IN_DXAX_TO_LCHS_CYLINDERS
111;   Parameters:
112;       DX:AX:  Number of LBA cylinders
113;   Returns:
114;       AX:     Number of L-CHS cylinders
115;   Corrupts registers:
116;       Nothing
117;--------------------------------------------------------------------
118%macro LIMIT_LBA_CYLINDERS_IN_DXAX_TO_LCHS_CYLINDERS 0
119    test    dx, dx
120    jnz     SHORT %%LoadMaxValueToAX
121    cmp     ax, MAX_LCHS_CYLINDERS
122    jbe     SHORT %%NoNeedToModify
123%%LoadMaxValueToAX:
124    mov     ax, MAX_LCHS_CYLINDERS
125%%NoNeedToModify:
126%endmacro
127
128
129%endif ; CUSTOMDPT_INC
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