1 | ; Project name : XTIDE Universal BIOS |
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2 | ; Description : Defines for DPT structs containing custom |
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3 | ; Disk Parameter Table used by this BIOS. |
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4 | %ifndef CUSTOMDPT_INC |
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5 | %define CUSTOMDPT_INC |
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6 | |
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7 | ; Base DPT for all device types |
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8 | struc DPT ; 10 bytes |
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9 | ; General Disk Parameter Table related |
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10 | .wFlags: |
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11 | .bFlagsLow resb 1 |
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12 | .bFlagsHigh resb 1 |
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13 | .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive |
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14 | |
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15 | ; IDE Drive related |
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16 | ; .bLbaHeads and .twLbaSectors are used for LBA addressing only. |
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17 | .bLbaHeads: resb 1 ; Number of LBA assisted heads (1...255) |
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18 | .twLbaSectors resb 2 ; 48-bit sector count for LBA addressing |
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19 | |
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20 | ; .wPchsCylinders and .bPchsSectors are used for CHS addressing only. |
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21 | .wPchsCylinders resb 2 ; Number of P-CHS Cylinders (1...16383) |
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22 | .wPchsHeadsAndSectors: |
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23 | .bPchsHeads resb 1 ; Number of P-CHS heads (1...16) |
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24 | .bPchsSectors resb 1 ; Number of P-CHS Sectors per Track (1...63) |
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25 | endstruc |
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26 | |
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27 | ; Bit definitions for DPT.bFlagsLow |
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28 | MASKL_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4) |
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29 | FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive |
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30 | MASKL_DPT_ADDRESSING_MODE EQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA) |
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31 | FLGL_DPT_ENABLE_IRQ EQU (1<<7) |
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32 | |
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33 | ; Bit definitions for DPT.bFlagsHigh |
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34 | FLGH_DPT_REVERSED_A0_AND_A3 EQU (1<<0) ; XTIDE mod, Address lines 0 and 3 reversed |
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35 | FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Use block transfer commands (must be bit 1!) |
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36 | %ifdef MODULE_SERIAL |
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37 | FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Serial Port Device |
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38 | %endif |
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39 | FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Set when waiting for IRQ |
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40 | |
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41 | ; IDE device only |
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42 | FLGH_DPT_INITERROR EQU (1<<7) |
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43 | %ifdef MODULE_ADVANCED_ATA |
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44 | FLGH_DPT_IORDY EQU (1<<6) ; Controller and Drive supports IORDY |
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45 | %endif |
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46 | |
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47 | ; Serial device only |
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48 | FLGH_DPT_SERIAL_FLOPPY EQU (1<<4) |
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49 | FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h |
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50 | FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 5 |
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51 | |
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52 | ; Addressing modes for DPT.wFlags |
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53 | ADDRESSING_MODE_FIELD_POSITION EQU 5 |
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54 | ADDRESSING_MODE_LCHS EQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes) |
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55 | ADDRESSING_MODE_PCHS EQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes) |
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56 | ADDRESSING_MODE_LBA28 EQU 2 ; 28-bit LBA Addressing Mode |
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57 | ADDRESSING_MODE_LBA48 EQU 3 ; 48-bit LBA Addressing Mode |
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58 | |
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59 | |
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60 | ; DPT for ATA devices |
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61 | struc DPT_ATA ; 10 + 2 bytes = 12 bytes |
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62 | .dpt resb DPT_size |
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63 | |
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64 | ; Block size is specified in sectors (1, 2, 4, 8, 16, 32, 64 or 128) |
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65 | .wSetAndMaxBlock: |
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66 | .bSetBlock resb 1 ; Current block size (do not set to zero!) |
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67 | .bMaxBlock resb 1 ; Maximum block size, 0 = block mode not supported |
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68 | endstruc |
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69 | |
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70 | |
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71 | ; Additional variables needed to initialize and reset Advanced IDE Controllers. |
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72 | ; EBDA must be reserved for DPTs when using these! |
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73 | %ifdef MODULE_ADVANCED_ATA |
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74 | struc DPT_ADVANCED_ATA |
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75 | .dpt_ata resb DPT_ATA_size |
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76 | .wControllerID resb 2 ; Controller specific ID WORD (from Advanced Controller detection) |
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77 | .wControllerBasePort resb 2 ; Advanced Controller port (not IDE port) |
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78 | .wMinPioCycleTime resb 2 ; Minimum PIO Cycle Time in ns |
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79 | .bPioMode resb 1 ; Best supported PIO mode |
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80 | .bDevice resb 1 ; Device Type from IDEVARS (overrided when 32-bit controller detected) |
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81 | endstruc |
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82 | %endif |
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83 | |
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84 | |
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85 | ; DPT for Serial devices |
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86 | %ifdef MODULE_SERIAL |
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87 | struc DPT_SERIAL |
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88 | .dpt resb DPT_size |
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89 | |
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90 | .wSerialPortAndBaud: |
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91 | .bSerialPort resb 1 ; Serial connection I/O port address, divided by 4 |
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92 | .bSerialBaud resb 1 ; Serial connection baud rate divisor |
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93 | endstruc |
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94 | %endif |
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95 | |
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96 | |
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97 | ; This is the common size for all DPTs. All DPTs must be equal size. |
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98 | %ifdef MODULE_ADVANCED_ATA |
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99 | LARGEST_DPT_SIZE EQU DPT_ADVANCED_ATA_size |
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100 | %else |
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101 | LARGEST_DPT_SIZE EQU DPT_ATA_size |
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102 | %endif |
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103 | |
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104 | |
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105 | ; Number of Sectors per Track is fixed to 63 for LBA assist calculation. |
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106 | ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads) |
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107 | MAX_LCHS_CYLINDERS EQU 1024 |
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108 | LBA_ASSIST_SPT EQU 63 |
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109 | |
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110 | |
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111 | ;-------------------------------------------------------------------- |
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112 | ; LIMIT_LBA_CYLINDERS_IN_DXAX_TO_LCHS_CYLINDERS |
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113 | ; Parameters: |
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114 | ; DX:AX: Number of LBA cylinders |
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115 | ; Returns: |
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116 | ; AX: Number of L-CHS cylinders |
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117 | ; Corrupts registers: |
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118 | ; Nothing |
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119 | ;-------------------------------------------------------------------- |
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120 | %macro LIMIT_LBA_CYLINDERS_IN_DXAX_TO_LCHS_CYLINDERS 0 |
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121 | test dx, dx |
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122 | jnz SHORT %%LoadMaxValueToAX |
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123 | cmp ax, MAX_LCHS_CYLINDERS |
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124 | jbe SHORT %%NoNeedToModify |
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125 | %%LoadMaxValueToAX: |
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126 | mov ax, MAX_LCHS_CYLINDERS |
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127 | %%NoNeedToModify: |
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128 | %endmacro |
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129 | |
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130 | |
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131 | %endif ; CUSTOMDPT_INC |
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