Changeset 593 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta

Timestamp:

Jun 30, 2018, 8:27:04 AM (6 years ago)

Author:

Tomi Tilli

Message:

Flashing now works again.
Hack to get Windows 95 to work properly (MODULE_WIN95_CMOS_HACK included for 386 builds by default).
Edited makefile to produce large 386 build.
Fixed recovery time for QDI Vision VLB-IDE controllers.
No more warnings with Nasm 2.13.xx and later.
File dialog now properly restores default drive when file selection is cancelled.

Location:

trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta

Files:

• AdvAtaInit.asm (modified) (2 diffs)
• Vision.asm (modified) (5 diffs)

trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm

@@ -33 +33 @@
 ;               Cleared if no controller
 ;   Corrupts registers:
-;       BX
+;       BX, CX
 ;--------------------------------------------------------------------
 AdvAtaInit_DetectControllerForIdeBaseInBX:
+    ; Detect if system has PCI bus. If it does, we can skip VLB detection. This is
+    ; good thing since detecting Vision QD6850 is dangerous since Intel PIIX4 south bridge
+    ; mirrors Interrupt Controller registers from Axh to Bxh. This can lead to faulty
+    ; detection of QD6850 that will eventually crash the system when ports are written.
+
+    ; We should save the 32-bit registers but we don't since system BIOS has stored
+    ; them already and we don't use the 32-bit registers ourselves anywhere at the moment.
+    push    bx
+    push    di
+    xor     edi, edi        ; Some BIOSes require this to be set to zero
+    mov     ax, PCI_INSTALLATION_CHECK
+    int     BIOS_TIME_PCI_PNP_1Ah
+    pop     di
+    pop     bx
+    test    ah, ah
+    jz      SHORT .ThisSystemHasPCIbus
+
+    ; Detect VLB controllers
     call    Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent
     jnz     SHORT .NoVisionControllerFound
@@ -51 +69 @@
 
 .NoAdvancedControllerForPortBX:
+.ThisSystemHasPCIbus:
     xor     ax, ax      ; Clear ID in AX and CF
     ret

trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/Vision.asm

@@ -41 +41 @@
     in      al, QD65XX_BASE_PORT + QD65XX_CONFIG_REGISTER_in
 
-%ifdef DANGEROUS_DETECTION
-    ; Checking alternative base port is currently commented away
-    ; since Intel PIIX4 south bridge mirrors Interrupt Controller registers
-    ; from Axh to Bxh.
     call    IsConfigRegisterWithIDinAL
     je      SHORT VisionControllerDetected.Return
@@ -51 +47 @@
     mov     dl, QD65XX_ALTERNATIVE_BASE_PORT
     in      al, QD65XX_ALTERNATIVE_BASE_PORT + QD65XX_CONFIG_REGISTER_in
-%endif ; DANGEROUS_DETECTION
     ; Fall to IsConfigRegisterWithIDinAL
 
@@ -198 +193 @@
 
     ; Calculate Recovery Time value for QD65xx IDE Timing Register
-    call    AtaID_GetRecoveryTimeToAXfromPioModeInBXandCycleTimeInCX
+    xchg    ax, cx
+    eMOVZX  cx, BYTE [cs:bx+.rgbToSubtractFromCycleTimeBasedOnPIOmode]
+    sub     ax, cx
     mov     bx, bp                      ; Active Time value now in BL
     mov     bp, QD65xx_MAX_RECOVERY_TIME_CLOCKS | (QD65xx_MIN_RECOVERY_TIME_CLOCKS << 8)
@@ -209 +206 @@
     ret                                 ; Return with CF cleared
 
+.rgbToSubtractFromCycleTimeBasedOnPIOmode:
+    ; For PIO 0 to 2 this method (t0 - (t1+t8+t9)) seems to give closest (little less) values to the fixed preset
+    ; values used by QDI6580 DOS driver v3.7
+    db      (PIO_0_MIN_ADDRESS_VALID_NS + PIO_0_MAX_ADDR_VALID_TO_IOCS16_RELEASED + PIO_0_DIORW_TO_ADDR_VALID_HOLD)
+    db      (PIO_1_MIN_ADDRESS_VALID_NS + PIO_1_MAX_ADDR_VALID_TO_IOCS16_RELEASED + PIO_1_DIORW_TO_ADDR_VALID_HOLD)
+    db      (PIO_2_MIN_ADDRESS_VALID_NS + PIO_2_MAX_ADDR_VALID_TO_IOCS16_RELEASED + PIO_2_DIORW_TO_ADDR_VALID_HOLD)
+    db      102     ; QDI6580 DOS driver v3.7 uses fixed values for PIO 3...
+    db      61      ; ...and PIO 4. No idea where these values come from.
+    db      (PIO_5_MIN_CYCLE_TIME_NS / 2) ; PIO 5 and 6 were not available when QD6850 was released. Use values...
+    db      (PIO_6_MIN_CYCLE_TIME_NS / 2) ; ...that resembles those used for PIO 4
+
 
 ;--------------------------------------------------------------------
@@ -226 +234 @@
 
     ; Get VLB Cycle Time in nanosecs
-    mov     cl, VLB_33MHZ_CYCLE_TIME    ; Assume 33 MHz or slower VLB bus
+    mov     cl, VLB_33MHZ_CYCLE_TIME    ; Assume 33 MHz or slower VLB bus (30 ns)
     test    BYTE [di+DPT_ADVANCED_ATA.wControllerID], FLG_QDCONFIG_ID3
-    eCMOVZ  cl, VLB_40MHZ_CYCLE_TIME
+    eCMOVZ  cl, VLB_40MHZ_CYCLE_TIME    ; (25 ns)
 
     ; Convert value in AX to VLB ticks