Changeset 559 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Main.asm


Ignore:
Timestamp:
Jun 24, 2013, 2:22:36 PM (11 years ago)
Author:
aitotat@…
google:author:
aitotat@gmail.com
Message:

Changes to XTIDE Universal BIOS:

  • All XT builds now default to 1 controller.
  • Very late initialization handler now waits read command until installing and calling 19h.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/XTIDE_Universal_BIOS/Src/Main.asm

    r556 r559  
    128128    at  ROMVARS.wBootTimeout,   dw  BOOT_MENU_DEFAULT_TIMEOUT
    129129%endif
    130 %ifdef MODULE_8BIT_IDE_ADVANCED
    131     at  ROMVARS.bIdeCnt,        db  2                       ; Number of supported controllers
    132 %else
    133130    at  ROMVARS.bIdeCnt,        db  1
    134 %endif
    135131    at  ROMVARS.bBootDrv,       db  80h                     ; Boot Menu default drive
    136132    at  ROMVARS.bMinFddCnt,     db  0                       ; Do not force minimum number of floppy drives
     
    138134    at  ROMVARS.bIdleTimeout,   db  0                       ; Standby timer disabled by default
    139135
    140     at  ROMVARS.ideVars0+IDEVARS.wBasePort,         dw  DEVICE_XTIDE_DEFAULT_PORT           ; Controller Command Block base port
    141     at  ROMVARS.ideVars0+IDEVARS.wControlBlockPort, dw  DEVICE_XTIDE_DEFAULT_PORTCTRL       ; Controller Control Block base port
    142     at  ROMVARS.ideVars0+IDEVARS.bDevice,           db  DEVICE_8BIT_XTIDE_REV1
     136%ifdef MODULE_8BIT_IDE_ADVANCED
     137    at  ROMVARS.ideVars0+IDEVARS.wBasePort,             dw  DEVICE_XTIDE_DEFAULT_PORT       ; Controller Command Block base port
     138    at  ROMVARS.ideVars0+IDEVARS.bDevice,               db  DEVICE_8BIT_XTCF_PIO8
     139%else
     140    at  ROMVARS.ideVars0+IDEVARS.wBasePort,             dw  DEVICE_XTIDE_DEFAULT_PORT       ; Controller Command Block base port
     141    at  ROMVARS.ideVars0+IDEVARS.wControlBlockPort,     dw  DEVICE_XTIDE_DEFAULT_PORTCTRL   ; Controller Control Block base port
     142    at  ROMVARS.ideVars0+IDEVARS.bDevice,               db  DEVICE_8BIT_XTIDE_REV1
     143%endif
    143144    at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    144145    at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
    145 
    146 %ifdef MODULE_8BIT_IDE_ADVANCED
    147     at  ROMVARS.ideVars1+IDEVARS.wBasePort,             dw  DEVICE_XTIDE_DEFAULT_PORT       ; Controller Command Block base port
    148     at  ROMVARS.ideVars1+IDEVARS.bDevice,               db  DEVICE_8BIT_XTCF_PIO8
    149 %endif
    150146
    151147    at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
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