Changeset 540 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc/Controllers
- Timestamp:
- Apr 13, 2013, 3:40:27 PM (12 years ago)
- google:author:
- aitotat@gmail.com
- File:
-
- 1 edited
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trunk/XTIDE_Universal_BIOS/Inc/Controllers/Vision.inc
r526 r540 27 27 ; Possible base addresses for QD6500 and QD6580 28 28 QD65XX_BASE_PORT EQU 30h 29 QD65XX_ALTERNATIVE_BASE_PORT EQU 0B0h 30 29 QD65XX_ALTERNATIVE_BASE_PORT EQU 0B0h ; This is the default setting but Intel PIIX4 South Bridge 30 ; (and likely other PCI chisets as well) mirror PIC registers here 31 31 32 32 ; Vision Register offsets from QD chip base port
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