Changeset 501 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src
- Timestamp:
- Jan 26, 2013, 4:58:50 PM (12 years ago)
- google:author:
- aitotat@gmail.com
- Location:
- trunk/XTIDE_Universal_BIOS/Src
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Src/Device/Device.asm
r480 r501 55 55 %else ; IDE 56 56 Device_FinalizeDPT EQU IdeDPT_Finalize 57 %endif58 59 60 ;--------------------------------------------------------------------61 ; Device_ResetMasterAndSlaveController62 ; Parameters:63 ; DS:DI: Ptr to DPT (in RAMVARS segment)64 ; Returns:65 ; AH: INT 13h Error Code66 ; CF: Cleared if success, Set if error67 ; Corrupts registers:68 ; AL, BX, CX, DX69 ;--------------------------------------------------------------------70 %ifdef MODULE_SERIAL ; IDE + Serial71 Device_ResetMasterAndSlaveController:72 TEST_USING_DPT_AND_JUMP_IF_SERIAL_DEVICE ReturnSuccessForSerialPort73 jmp IdeCommand_ResetMasterAndSlaveController74 75 %else ; IDE76 Device_ResetMasterAndSlaveController EQU IdeCommand_ResetMasterAndSlaveController77 57 %endif 78 58 -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm
r493 r501 20 20 ; Section containing code 21 21 SECTION .text 22 23 ;--------------------------------------------------------------------24 ; IdeCommand_ResetMasterAndSlaveController25 ; Parameters:26 ; DS:DI: Ptr to DPT (in RAMVARS segment)27 ; Returns:28 ; AH: INT 13h Error Code29 ; CF: Cleared if success, Set if error30 ; Corrupts registers:31 ; AL, BX, CX, DX32 ;--------------------------------------------------------------------33 IdeCommand_ResetMasterAndSlaveController:34 ; HSR0: Set_SRST35 call AccessDPT_GetDeviceControlByteToAL36 or al, FLG_DEVCONTROL_SRST | FLG_DEVCONTROL_nIEN ; Set Reset bit37 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out38 mov ax, HSR0_RESET_WAIT_US39 call Timer_DelayMicrosecondsFromAX40 41 ; HSR1: Clear_wait42 call AccessDPT_GetDeviceControlByteToAL43 or al, FLG_DEVCONTROL_nIEN44 and al, ~FLG_DEVCONTROL_SRST ; Clear reset bit45 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out46 mov ax, HSR1_RESET_WAIT_US47 call Timer_DelayMicrosecondsFromAX48 49 ; HSR2: Check_status50 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MAXIMUM, FLG_STATUS_BSY)51 jmp IdeWait_PollStatusFlagInBLwithTimeoutInBH52 53 22 54 23 ;-------------------------------------------------------------------- -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm
r496 r501 77 77 78 78 .ShlRegisterIndexInDX: 79 eSHL_IMdx, 179 shl dx, 1 80 80 ; Fall to .InputToALfromRegisterInDX 81 81 … … 98 98 ;-------------------------------------------------------------------- 99 99 IdeIO_OutputALtoIdeControlBlockRegisterInDL: 100 ; Note! We do not need to reverse A0 and A3 for XTIDE rev 2 since101 ; the only Control Block Register we access is DEVICE_CONTROL_REGISTER_out102 ; at offset 6 (0110b).103 100 xor dh, dh ; IDE Register index now in DX 104 101 105 102 mov bl, [di+DPT_ATA.bDevice] 106 103 cmp bl, DEVICE_8BIT_XTIDE_REV2 107 jbe SHORT .OutputALtoControlBlockRegisterInDX ; Standard IDE controllers and XTIDE rev 1 104 je SHORT .ReverseA0andA3fromRegisterIndexInDX 105 jb SHORT .OutputALtoControlBlockRegisterInDX ; Standard IDE controllers and XTIDE rev 1 108 106 109 107 %ifdef MODULE_8BIT_IDE_ADVANCED … … 117 115 %endif 118 116 117 .ReverseA0andA3fromRegisterIndexInDX: 118 ; We cannot use lookup table since A3 will be always set because 119 ; Control Block Registers start from Command Block + 8h. We can do 120 ; a small trick since we only access Device Control Register at 121 ; offset 6h: Always clear A3 and set A0. 122 add dx, [cs:bx+IDEVARS.wControlBlockPort] 123 xor dl, 1001b ; Clear A3, Set A0 124 jmp SHORT OutputALtoPortInDX 125 119 126 .ShlRegisterIndexInDX: 120 127 add dl, XTCF_CONTROL_BLOCK_OFFSET 121 eSHL_IMdx, 1128 shl dx, 1 122 129 jmp SHORT OutputALtoRegisterInDX 123 130 … … 163 170 ret 164 171 %endif 165 172 166 173 .ReverseA0andA3fromRegisterIndexInDX: 167 174 mov bx, dx … … 170 177 171 178 .ShlRegisterIndexInDX: 172 eSHL_IMdx, 1179 shl dx, 1 173 180 ; Fall to OutputALtoRegisterInDX 174 181 -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH0h_HReset.asm
r491 r501 38 38 ;-------------------------------------------------------------------- 39 39 AH0h_HandlerForDiskControllerReset: 40 ; Reset Floppy Drives with INT 40h41 40 xor bx, bx ; Zero BH to assume no errors 42 41 or bl, dl ; Copy requested drive to BL 43 eCMOVS dl, bh ; Reset Floppy Drive(s) with 00h since DL has Hard Drive number44 45 xor ah, ah ; Disk Controller Reset46 int BIOS_DISKETTE_INTERRUPT_40h47 call BackupErrorCodeFromTheRequestedDriveToBH48 ; We do not reset Hard Drives if DL was 0xh on entry49 50 42 51 43 %ifdef MODULE_SERIAL_FLOPPY … … 69 61 %endif 70 62 71 ; Reset foreign Hard Drives (those handled by other BIOSes) 63 ; Reset foreign Floppy and Hard Drives (those handled by other BIOSes) 64 call ResetForeignDrives 72 65 test bl, bl ; If we were called with a floppy disk, then we are done, 73 66 jns SHORT .SkipHardDiskReset ; don't do hard disks. 74 call ResetForeignHardDisks75 67 76 68 ; Resetting our hard disks will modify dl and bl to be idevars offset based instead of drive number based, 77 69 ; such that this call must be the last in the list of reset routines called. 78 70 ; 79 ; This needs to happen after ResetForeign HardDisks, as that call may have set the error code for 80h,71 ; This needs to happen after ResetForeignDrives, as that call may have set the error code for 80h, 80 72 ; and we need to override that value if we are xlate'd into 80h with one of our drives. 81 73 ; … … 88 80 89 81 ;-------------------------------------------------------------------- 90 ; ResetForeign HardDisks82 ; ResetForeignDrives 91 83 ; Parameters: 92 ; BL: Requested Hard Drive (DL when entering AH=00h)84 ; BL: Requested Floppy or Hard Drive (DL when entering AH=00h) 93 85 ; DS: RAMVARS segment 94 86 ; Returns: … … 97 89 ; AX, DL 98 90 ;-------------------------------------------------------------------- 99 ResetForeign HardDisks:91 ResetForeignDrives: 100 92 ; If there are drives after our drives, those are already reset 101 93 ; since our INT 13h was called by some other BIOS. … … 103 95 ; There could be more in chain but let the previous one handle them. 104 96 mov dl, [RAMVARS.bFirstDrv] 105 or dl, 80h ; We may not have our drives at all !106 MIN_U dl, bl ; BL is always Hard Drive number97 or dl, 80h ; We may not have our drives at all so change 0 to 80h! 98 MIN_U dl, bl 107 99 108 100 xor ah, ah ; Disk Controller Reset … … 135 127 ; ResetHardDisksHandledByOurBIOS 136 128 ; Parameters: 129 ; BL: Requested drive (DL when entering AH=00h) 137 130 ; DS:DI: Ptr to DPT for requested drive 138 131 ; If DPT pointer is not available, or error result in BH won't be used anyway, -
trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AHDh_HReset.asm
r473 r501 65 65 call Interrupts_UnmaskInterruptControllerForDriveInDSDI 66 66 %endif 67 call Device_ResetMasterAndSlaveController68 ;jc SHORT .ReturnError ; CF would be set if slave drive present without master69 ; (error register has special values after reset)70 71 67 ; Initialize Master and Slave drives 72 68 call AccessDPT_GetIdevarsToCSBX -
trunk/XTIDE_Universal_BIOS/Src/Initialization/Interrupts.asm
r492 r501 63 63 mov ax, [es:BIOS_DISK_INTERRUPT_13h*4] ; Load old INT 13h offset 64 64 mov [RAMVARS.fpOldI13h], ax ; Store old INT 13h offset 65 66 ; NOTE! Installing INT 40h handler is currently uncommented to test 67 ; if it is really needed. I suspect that it is not. Many bytes can be 68 ; saved if INT 40h related code can be removed. 69 %if 0 65 70 66 71 ; Only store INT 13h handler to 40h if 40h is not already installed. … … 72 77 mov [es:BIOS_DISKETTE_INTERRUPT_40h*4+2], dx ; Store old INT 13h segment 73 78 .Int40hAlreadyInstalled: 79 %endif ; 0 74 80 75 81 mov al, BIOS_DISK_INTERRUPT_13h ; INT 13h interrupt vector offset
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