Changeset 473 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Device


Ignore:
Timestamp:
Oct 10, 2012, 6:22:23 PM (12 years ago)
Author:
aitotat@…
google:author:
aitotat@gmail.com
Message:

Changes to XTIDE Universal BIOS:

  • Large changes to prepare full XT-CF support (DMA not yet implemented and memory mapped transfers are not working).
Location:
trunk/XTIDE_Universal_BIOS/Src/Device
Files:
1 added
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/XTIDE_Universal_BIOS/Src/Device/Device.asm

    r443 r473  
    8282;   Parameters:
    8383;       BH:     Drive Select byte for Drive and Head Select Register
     84;       DX:     Autodetected port (for devices that support autodetection)
    8485;       DS:     Segment to RAMVARS
    8586;       ES:SI:  Ptr to normalized buffer to receive 512-byte IDE Information
  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm

    r445 r473  
    5656;   Parameters:
    5757;       BH:     Drive Select byte for Drive and Head Select Register
     58;       DX:     Autodetected port for XT-CF
    5859;       DS:     Segment to RAMVARS
    5960;       ES:SI:  Ptr to buffer to receive 512-byte IDE Information
     
    7071    eMOVZX  ax, bh
    7172    mov     [di+DPT.wFlags], ax
    72     mov     [di+DPT.bIdevarsOffset], bp
     73    call    CreateDPT_StoreIdevarsOffsetAndBasePortFromCSBPtoDPTinDSDI
     74    call    IdeDPT_StoreDeviceTypeToDPTinDSDIfromIdevarsInCSBP
    7375    mov     BYTE [di+DPT_ATA.bBlockSize], 1 ; Block = 1 sector
    74     call    IdeDPT_StoreDeviceTypeFromIdevarsInCSBPtoDPTinDSDI
    7576
    7677    ; Wait until drive motors have reached full speed
    77     cmp     bp, BYTE ROMVARS.ideVars0       ; First controller?
     78    cmp     bp, BYTE ROMVARS.ideVars0   ; First controller?
    7879    jne     SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster
    79     test    bh, FLG_DRVNHEAD_DRV            ; Wait already done for Master
     80    test    bh, FLG_DRVNHEAD_DRV        ; Wait already done for Master
    8081    jnz     SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster
    8182    call    AHDh_WaitUntilDriveMotorHasReachedFullSpeed
     
    8788
    8889%ifdef MODULE_8BIT_IDE
    89     ; Enable 8-bit PIO mode for Lo-tech XT-CF
     90    ; We set XT-CF to 8-bit PIO mode for Identify Device command.
     91    ; Correct XT-CF mode is later set on AH=09h (after all drives are detected).
     92    call    AccessDPT_IsThisDeviceXTCF
     93    jne     SHORT .SkipXTCFmodeChange
     94
     95    xor     al, al                      ; XTCF_8BIT_PIO_MODE
    9096    push    si
    91     call    AH9h_Enable8bitPioModeForXTCF
     97    call    AH1Eh_ChangeXTCFmodeBasedOnControlRegisterInAL
    9298    pop     si
    9399    jc      SHORT .FailedToSet8bitMode
    94 %endif
     100.SkipXTCFmodeChange:
     101%endif ; MODULE_8BIT_IDE
    95102
    96103    ; Prepare to output Identify Device command
     
    170177    cmp     bl, FLG_STATUS_DRQ              ; Data transfer started?
    171178    jne     SHORT .WaitUntilNonTransferCommandCompletes
    172 %ifdef MODULE_JRIDE
    173     cmp     BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_JRIDE_ISA
    174     je      SHORT JrIdeTransfer_StartWithCommandInAL
     179%ifdef MODULE_8BIT_IDE
     180    cmp     BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_XTCF_DMA
     181    je      SHORT 0 ; IdeDma_StartTransferWithCommandInAL
     182    ja      SHORT JrIdeTransfer_StartWithCommandInAL    ; DEVICE_8BIT_XTCF_MEMMAP or DEVICE_8BIT_JRIDE_ISA
    175183%endif
    176184    jmp     IdeTransfer_StartWithCommandInAL
     
    205213    ; We use different timeout value when detecting drives.
    206214    ; This prevents unnecessary long delays when drive is not present.
    207     mov     bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRDY, FLG_STATUS_DRDY)
     215    mov     cx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRDY, FLG_STATUS_DRDY)
    208216    cmp     WORD [RAMVARS.wDrvDetectSignature], RAMVARS_DRV_DETECT_SIGNATURE
    209     eCMOVE  bh, TIMEOUT_SELECT_DRIVE_DURING_DRIVE_DETECTION
     217    eCMOVE  ch, TIMEOUT_SELECT_DRIVE_DURING_DRIVE_DETECTION
    210218
    211219    ; Select Master or Slave Drive
    212220    mov     al, [bp+IDEPACK.bDrvAndHead]
    213221    OUTPUT_AL_TO_IDE_REGISTER   DRIVE_AND_HEAD_SELECT_REGISTER
     222    mov     bx, cx
    214223    call    IdeWait_PollStatusFlagInBLwithTimeoutInBH
    215224
     
    248257
    249258    mov     al, ch
    250     JUMP_TO_OUTPUT_AL_TO_IDE_REGISTER   LBA_HIGH_REGISTER
     259    OUTPUT_AL_TO_IDE_REGISTER   LBA_HIGH_REGISTER
     260    ret
  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm

    r410 r473  
    6464;--------------------------------------------------------------------
    6565.StoreDeviceType:
    66     call    IdeDPT_StoreDeviceTypeFromIdevarsInCSBPtoDPTinDSDI
     66    call    IdeDPT_StoreDeviceTypeToDPTinDSDIfromIdevarsInCSBP
    6767
    6868
     
    111111;--------------------------------------------------------------------
    112112.DetectAdvancedIdeController:
    113     call    AccessDPT_GetIdeBasePortToBX
     113    mov     bx, [di+DPT.wBasePort]
    114114    call    AdvAtaInit_DetectControllerForIdeBaseInBX
    115115    mov     [di+DPT_ADVANCED_ATA.wControllerID], ax ; Store zero if none detected
     
    138138
    139139;--------------------------------------------------------------------
    140 ; IdeDPT_StoreDeviceTypeFromIdevarsInCSBPtoDPTinDSDI
     140; IdeDPT_StoreDeviceTypeToDPTinDSDIfromIdevarsInCSBP
    141141;   Parameters:
    142142;       DS:DI:  Ptr to Disk Parameter Table
     
    147147;       AL
    148148;--------------------------------------------------------------------
    149 IdeDPT_StoreDeviceTypeFromIdevarsInCSBPtoDPTinDSDI:
     149IdeDPT_StoreDeviceTypeToDPTinDSDIfromIdevarsInCSBP:
    150150    mov     al, [cs:bp+IDEVARS.bDevice]
    151151    mov     [di+DPT_ATA.bDevice], al
  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm

    r443 r473  
    11; Project name  :   XTIDE Universal BIOS
    2 ; Description   :   IDE Register I/O functions.
     2; Description   :   IDE Register I/O functions when supporting 8-bit
     3;                   devices that need address translations.
    34
    45;
     
    2223
    2324;--------------------------------------------------------------------
     25; IdeIO_InputStatusRegisterToAL
     26;   Parameters:
     27;       DS:DI:  Ptr to DPT (in RAMVARS segment)
     28;   Returns:
     29;       AL:     IDE Status Register contents
     30;   Corrupts registers:
     31;       BX, DX
     32;--------------------------------------------------------------------
     33ALIGN JUMP_ALIGN
     34IdeIO_InputStatusRegisterToAL:
     35%ifndef MODULE_8BIT_IDE
     36    INPUT_TO_AL_FROM_IDE_REGISTER STATUS_REGISTER_in
     37    ret
     38
     39%else
     40    mov     dl, STATUS_REGISTER_in
     41    ; Fall to IdeIO_InputToALfromIdeRegisterInDL
     42
     43;--------------------------------------------------------------------
     44; IdeIO_InputToALfromIdeRegisterInDL
     45;   Parameters:
     46;       DL:     IDE Register
     47;       DS:DI:  Ptr to DPT (in RAMVARS segment)
     48;   Returns:
     49;       AL:     Inputted byte
     50;   Corrupts registers:
     51;       BX, DX
     52;--------------------------------------------------------------------
     53IdeIO_InputToALfromIdeRegisterInDL:
     54    xor     dh, dh  ; IDE Register index now in DX
     55
     56    mov     al, [di+DPT_ATA.bDevice]
     57    cmp     al, DEVICE_8BIT_XTIDE_REV2
     58    je      SHORT .ReverseA0andA3fromRegisterIndexInDX
     59    jb      SHORT .InputToALfromRegisterInDX    ; Standard IDE controllers and XTIDE rev 1
     60    cmp     al, DEVICE_8BIT_JRIDE_ISA
     61    jne     SHORT .ShlRegisterIndexInDX         ; All XT-CF modes
     62    ; Fall to .InputToALfromMemoryMappedRegisterInDX
     63
     64.InputToALfromMemoryMappedRegisterInDX:
     65    mov     bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
     66    add     bx, dx
     67    push    ds
     68    mov     ds, [di+DPT.wBasePort]  ; Segment for JR-IDE/ISA
     69    mov     al, [bx]
     70    pop     ds
     71    ret
     72
     73.ReverseA0andA3fromRegisterIndexInDX:
     74    mov     bx, dx
     75    mov     dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex]
     76    SKIP2B  bx  ; Skip shl dx, 1
     77
     78.ShlRegisterIndexInDX:
     79    shl     dx, 1
     80    ; Fall to .InputToALfromRegisterInDX
     81
     82.InputToALfromRegisterInDX:
     83    add     dx, [di+DPT.wBasePort]
     84    in      al, dx
     85    ret
     86
     87
     88;--------------------------------------------------------------------
    2489; IdeIO_OutputALtoIdeControlBlockRegisterInDL
    2590;   Parameters:
     
    3398;--------------------------------------------------------------------
    3499IdeIO_OutputALtoIdeControlBlockRegisterInDL:
    35     %ifdef MODULE_8BIT_IDE
    36         mov     dh, [di+DPT_ATA.bDevice]
    37         %ifdef MODULE_JRIDE
    38             test    dh, dh
    39             jnz     SHORT .OutputToIoMappedIde
    40        
    41             add     dx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET
    42             jmp     SHORT OutputToJrIdeRegister
    43         .OutputToIoMappedIde:
    44         %endif  ; MODULE_JRIDE
    45     %endif  ; MODULE_8BIT_IDE
     100    ; Note! We do not need to reverse A0 and A3 for XTIDE rev 2 since
     101    ; the only Control Block Register we access is DEVICE_CONTROL_REGISTER_out
     102    ; at offset 6 (0110b).
     103    xor     dh, dh  ; IDE Register index now in DX
    46104
    47     mov     bl, IDEVARS.wPortCtrl
    48     jmp     SHORT OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL
     105    mov     bl, [di+DPT_ATA.bDevice]
     106    cmp     bl, DEVICE_8BIT_XTIDE_REV2
     107    jbe     SHORT .OutputALtoControlBlockRegisterInDX   ; Standard IDE controllers and XTIDE rev 1
     108    cmp     bl, DEVICE_8BIT_JRIDE_ISA
     109    jne     SHORT .ShlRegisterIndexInDX     ; All XT-CF modes
     110    ; Fall to .OutputALtoMemoryMappedRegisterInDX
     111
     112.OutputALtoMemoryMappedRegisterInDX:
     113    mov     bx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET
     114    jmp     SHORT IdeIO_OutputALtoIdeRegisterInDL.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX
     115
     116.ShlRegisterIndexInDX:
     117    add     dl, OFFSET_TO_CONTROL_BLOCK_REGISTERS
     118    shl     dx, 1
     119    jmp     SHORT OutputALtoRegisterInDX
     120
     121.OutputALtoControlBlockRegisterInDX:
     122    call    AccessDPT_GetIdevarsToCSBX
     123    add     dx, [cs:bx+IDEVARS.wControlBlockPort]
     124    jmp     SHORT OutputALtoPortInDX
    49125
    50126
     
    62138ALIGN JUMP_ALIGN
    63139IdeIO_OutputALtoIdeRegisterInDL:
    64     %ifdef MODULE_8BIT_IDE
    65         mov     dh, [di+DPT_ATA.bDevice]
    66         %ifdef MODULE_JRIDE
    67             test    dh, dh
    68             jnz     SHORT OutputALtoIOmappedIdeRegisterInDL
    69        
    70         %if JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET & 0FFh = 0
    71             mov     dh, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8
    72         %else
    73             add     dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
    74         %endif
    75         OutputToJrIdeRegister:
    76             mov     bx, dx
    77             mov     [cs:bx], al
    78             ret
    79         ALIGN JUMP_ALIGN
    80         OutputALtoIOmappedIdeRegisterInDL:
    81         %endif  ; MODULE_JRIDE
    82     %endif  ; MODULE_8BIT_IDE
     140    xor     dh, dh  ; IDE Register index now in DX
    83141
    84     mov     bl, IDEVARS.wPort
    85 OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL:
    86     call    GetIdePortToDX
     142    mov     bl, [di+DPT_ATA.bDevice]
     143    cmp     bl, DEVICE_8BIT_XTIDE_REV2
     144    je      SHORT .ReverseA0andA3fromRegisterIndexInDX
     145    jb      SHORT OutputALtoRegisterInDX    ; Standard IDE controllers and XTIDE rev 1
     146    cmp     bl, DEVICE_8BIT_JRIDE_ISA
     147    jne     SHORT .ShlRegisterIndexInDX     ; All XT-CF modes
     148    ; Fall to .OutputALtoMemoryMappedRegisterInDX
     149
     150.OutputALtoMemoryMappedRegisterInDX:
     151    mov     bx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
     152.OutputALtoMemoryMappedRegisterInDXwithWindowOffsetInBX:
     153    add     bx, dx
     154    push    ds
     155    mov     ds, [di+DPT.wBasePort]  ; Segment for JR-IDE/ISA
     156    mov     [bx], al
     157    pop     ds
     158    ret
     159
     160.ReverseA0andA3fromRegisterIndexInDX:
     161    mov     bx, dx
     162    mov     dl, [cs:bx+g_rgbSwapA0andA3fromIdeRegisterIndex]
     163    SKIP2B  bx  ; Skip shl dx, 1
     164
     165.ShlRegisterIndexInDX:
     166    shl     dx, 1
     167    ; Fall to OutputALtoRegisterInDX
     168
     169ALIGN JUMP_ALIGN
     170OutputALtoRegisterInDX:
     171    add     dx, [di+DPT.wBasePort]
     172OutputALtoPortInDX:
    87173    out     dx, al
    88174    ret
    89175
    90176
    91 ;--------------------------------------------------------------------
    92 ; IdeIO_InputStatusRegisterToAL
    93 ;   Parameters:
    94 ;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    95 ;   Returns:
    96 ;       AL:     IDE Status Register contents
    97 ;   Corrupts registers:
    98 ;       BX, DX
    99 ;--------------------------------------------------------------------
    100 ALIGN JUMP_ALIGN
    101 IdeIO_InputStatusRegisterToAL:
    102     mov     dl, STATUS_REGISTER_in
    103     ; Fall to IdeIO_InputToALfromIdeRegisterInDL
    104177
    105 ;--------------------------------------------------------------------
    106 ; IdeIO_InputToALfromIdeRegisterInDL
    107 ;   Parameters:
    108 ;       DL:     IDE Register
    109 ;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    110 ;   Returns:
    111 ;       AL:     Inputted byte
    112 ;   Corrupts registers:
    113 ;       BX, DX
    114 ;--------------------------------------------------------------------
    115 IdeIO_InputToALfromIdeRegisterInDL:
    116     %ifdef MODULE_8BIT_IDE
    117         mov     dh, [di+DPT_ATA.bDevice]
    118         %ifdef MODULE_JRIDE
    119             test    dh, dh
    120             jnz     SHORT .InputToALfromIOmappedIdeRegisterInDL
    121        
    122         %if JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET & 0FFh = 0
    123             mov     dh, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8
    124         %else
    125             add     dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
    126         %endif
    127             mov     bx, dx
    128             mov     al, [cs:bx]
    129             ret
    130         .InputToALfromIOmappedIdeRegisterInDL:
    131         %endif  ; MODULE_JRIDE
    132     %endif  ; MODULE_8BIT_IDE
    133     mov     bl, IDEVARS.wPort
    134     call    GetIdePortToDX
    135     in      al, dx
    136     ret
     178; A0 <-> A3 lookup table
     179g_rgbSwapA0andA3fromIdeRegisterIndex:
     180    db  0000b   ; <-> 0000b, 0
     181    db  1000b   ; <-> 0001b, 1
     182    db  0010b   ; <-> 0010b, 2
     183    db  1010b   ; <-> 0011b, 3
     184    db  0100b   ; <-> 0100b, 4
     185    db  1100b   ; <-> 0101b, 5
     186    db  0110b   ; <-> 0110b, 6
     187    db  1110b   ; <-> 0111b, 7
    137188
    138 
    139 ;--------------------------------------------------------------------
    140 ; GetIdePortToDX
    141 ;   Parameters:
    142 ;       BL:     Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl)
    143 ;       DH:     Device Type (IDEVARS.bDevice)
    144 ;       DL:     IDE Register
    145 ;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    146 ;   Returns:
    147 ;       DX:     Source/Destination Port
    148 ;   Corrupts registers:
    149 ;       BX
    150 ;--------------------------------------------------------------------
    151 ALIGN JUMP_ALIGN
    152 GetIdePortToDX:
    153 %ifdef MODULE_8BIT_IDE
    154     ; Point CS:BX to IDEVARS
    155     xor     bh, bh
    156     add     bl, [di+DPT.bIdevarsOffset]         ; CS:BX now points port address
    157 
    158     ; Load port address and check if A0 and A3 address lines need to be reversed
    159     cmp     dh, DEVICE_8BIT_XTIDE_REV1
    160     mov     dh, bh                              ; DX now has IDE register offset
    161     jae     SHORT .ReturnUntranslatedPortInDX   ; No need to swap address lines
    162 
    163     ; Exchange address lines A0 and A3 from DL
    164     add     dx, [cs:bx]                         ; DX now has port address
    165     mov     bl, dl                              ; Port low byte to BL
    166     and     bl, MASK_A3_AND_A0_ADDRESS_LINES    ; Clear all bits except A0 and A3
    167     jz      SHORT .ReturnTranslatedPortInDX     ; A0 and A3 both zeroes, no change needed
    168     cmp     bl, MASK_A3_AND_A0_ADDRESS_LINES
    169     je      SHORT .ReturnTranslatedPortInDX     ; A0 and A3 both ones, no change needed
    170     xor     dl, MASK_A3_AND_A0_ADDRESS_LINES    ; Invert A0 and A3
    171 .ReturnTranslatedPortInDX:
    172     ret
    173 
    174 .ReturnUntranslatedPortInDX:
    175     add     dx, [cs:bx]
    176     ret
    177 
    178 %else   ; Only standard IDE devices
    179     xor     bh, bh
    180     add     bl, [di+DPT.bIdevarsOffset]         ; CS:BX now points port address
    181     xor     dh, dh
    182     add     dx, [cs:bx]                         ; DX now has port address
    183     ret
    184 %endif
     189%endif ; MODULE_8BIT_IDE
  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeTransfer.asm

    r445 r473  
    206206ALIGN JUMP_ALIGN
    207207InitializePiovarsInSSBPwithSectorCountInAH:
    208     ; Store sizes
     208    ; Store sizes and Data Port
    209209    mov     [bp+PIOVARS.bSectorsLeft], ah
     210    mov     ax, [di+DPT.wBasePort]
     211    mov     [bp+PIOVARS.wDataPort], ax
    210212    eMOVZX  ax, [di+DPT_ATA.bBlockSize]
    211213    mov     [bp+PIOVARS.wSectorsInBlock], ax
     
    214216    ; Get transfer function based on bus type
    215217    xchg    ax, bx                              ; Lookup table offset to AX
    216     mov     bl, [di+DPT.bIdevarsOffset]         ; CS:BX now points to IDEVARS
    217     mov     dx, [cs:bx+IDEVARS.wPort]           ; Load IDE Data port address
    218218    mov     bl, [di+DPT_ATA.bDevice]
    219219    add     bx, ax
    220 
    221     mov     [bp+PIOVARS.wDataPort], dx
    222220    mov     ax, [cs:bx]                         ; Load offset to transfer function
    223221    mov     [bp+PIOVARS.fnXfer], ax
     
    225223
    226224
    227 ;--------------------------------------------------------------------
    228 ; ReadBlockFromXtideRev1        XTIDE rev 1
    229 ; ReadBlockFromXtideRev2        XTIDE rev 2 or rev 1 with swapped A0 and A3 (chuck-mod)
    230 ; ReadBlockFrom8bitDataPort     CF-XT when using 8-bit PIO
    231 ; ReadBlockFrom16bitDataPort    Normal 16-bit IDE
    232 ; ReadBlockFrom32bitDataPort    VLB/PCI 32-bit IDE
    233 ;   Parameters:
    234 ;       CX:     Block size in 512 byte sectors
    235 ;       DX:     IDE Data port address
    236 ;       ES:DI:  Normalized ptr to buffer to receive data
    237 ;   Returns:
    238 ;       Nothing
    239 ;   Corrupts registers:
    240 ;       AX, BX, CX
    241 ;--------------------------------------------------------------------
    242 %ifdef MODULE_8BIT_IDE
    243 
    244     ALIGN JUMP_ALIGN
    245     ReadBlockFromXtideRev1:
    246         UNROLL_SECTORS_IN_CX_TO_OWORDS
    247         mov     bl, 8       ; Bit mask for toggling data low/high reg
    248     ALIGN JUMP_ALIGN
    249     .InswLoop:
    250     %rep 8  ; WORDs
    251         XTIDE_INSW
    252     %endrep
    253         loop    .InswLoop
    254         ret
    255 
    256     ;--------------------------------------------------------------------
    257     %ifndef USE_186         ; 8086/8088 compatible WORD read
    258         ALIGN JUMP_ALIGN
    259         ReadBlockFromXtideRev2:
    260             UNROLL_SECTORS_IN_CX_TO_OWORDS
    261         ALIGN JUMP_ALIGN
    262         .ReadNextOword:
    263         %rep 8  ; WORDs
    264             in      ax, dx      ; Read WORD
    265             stosw               ; Store WORD to [ES:DI]
    266         %endrep
    267             loop    .ReadNextOword
    268             ret
    269     %endif
    270 
    271     ;--------------------------------------------------------------------
    272     %ifdef USE_186
    273         ALIGN JUMP_ALIGN
    274         ReadBlockFrom8bitDataPort:
    275             shl     cx, 9       ; Sectors to BYTEs
    276             rep insb
    277             ret
    278 
    279     %else ; If 8088/8086
    280         ALIGN JUMP_ALIGN
    281         ReadBlockFrom8bitDataPort:
    282             UNROLL_SECTORS_IN_CX_TO_OWORDS
    283         ALIGN JUMP_ALIGN
    284         .ReadNextOword:
    285         %rep 16 ; BYTEs
    286             in      al, dx      ; Read BYTE
    287             stosb               ; Store BYTE to [ES:DI]
    288         %endrep
    289             loop    .ReadNextOword
    290             ret
    291     %endif
    292 %endif  ; MODULE_8BIT_IDE
    293 
    294 ;--------------------------------------------------------------------
    295 %ifdef USE_186
    296     ALIGN JUMP_ALIGN
    297     ReadBlockFrom16bitDataPort:
    298         xchg    cl, ch      ; Sectors to WORDs
    299         rep insw
    300         ret
    301 %endif
    302 
    303 ;--------------------------------------------------------------------
    304 %ifdef USE_AT
    305     ALIGN JUMP_ALIGN
    306     ReadBlockFrom32bitDataPort:
    307         shl     cx, 7       ; Sectors to DWORDs
    308         rep
    309         db      66h         ; Override operand size to 32-bit
    310         db      6Dh         ; INSW/INSD
    311         ret
    312 %endif
    313 
    314 
    315 ;--------------------------------------------------------------------
    316 ; WriteBlockToXtideRev1         XTIDE rev 1
    317 ; WriteBlockToXtideRev2         XTIDE rev 2 or rev 1 with swapped A0 and A3 (chuck-mod)
    318 ; WriteBlockTo8bitDataPort      XT-CF when using 8-bit PIO
    319 ; WriteBlockTo16bitDataPort     Normal 16-bit IDE
    320 ; WriteBlockTo32bitDataPort     VLB/PCI 32-bit IDE
    321 ;   Parameters:
    322 ;       CX:     Block size in 512-byte sectors
    323 ;       DX:     IDE Data port address
    324 ;       ES:SI:  Normalized ptr to buffer containing data
    325 ;   Returns:
    326 ;       Nothing
    327 ;   Corrupts registers:
    328 ;       AX, BX, CX, DX
    329 ;--------------------------------------------------------------------
    330 %ifdef MODULE_8BIT_IDE
    331 
    332     ALIGN JUMP_ALIGN
    333     WriteBlockToXtideRev1:
    334         push    ds
    335         UNROLL_SECTORS_IN_CX_TO_QWORDS
    336         mov     bl, 8       ; Bit mask for toggling data low/high reg
    337         push    es          ; Copy ES...
    338         pop     ds          ; ...to DS
    339     ALIGN JUMP_ALIGN
    340     .OutswLoop:
    341     %rep 4  ; WORDs
    342         XTIDE_OUTSW
    343     %endrep
    344         loop    .OutswLoop
    345         pop     ds
    346         ret
    347 
    348     ;--------------------------------------------------------------------
    349     ALIGN JUMP_ALIGN
    350     WriteBlockToXtideRev2:
    351         UNROLL_SECTORS_IN_CX_TO_QWORDS
    352         push    ds
    353         push    es          ; Copy ES...
    354         pop     ds          ; ...to DS
    355     ALIGN JUMP_ALIGN
    356     .WriteNextQword:
    357     %rep 4  ; WORDs
    358         XTIDE_MOD_OUTSW
    359     %endrep
    360         loop    .WriteNextQword
    361         pop     ds
    362         ret
    363 
    364     ;--------------------------------------------------------------------
    365     %ifdef USE_186
    366         ALIGN JUMP_ALIGN
    367         WriteBlockTo8bitDataPort:
    368             shl     cx, 9       ; Sectors to BYTEs
    369             es                  ; Source is ES segment
    370             rep outsb
    371             ret
    372 
    373     %else ; If 8088/8086
    374         ALIGN JUMP_ALIGN
    375         WriteBlockTo8bitDataPort:
    376             UNROLL_SECTORS_IN_CX_TO_DWORDS
    377             push    ds
    378             push    es
    379             pop     ds
    380         ALIGN JUMP_ALIGN
    381         .WriteNextDword:
    382         %rep 4  ; BYTEs
    383             lodsb               ; Load BYTE from [DS:SI]
    384             out     dx, al      ; Write BYTE
    385         %endrep
    386             loop    .WriteNextDword
    387             pop     ds
    388             ret
    389     %endif
    390 %endif  ; MODULE_8BIT_IDE
    391 
    392 ;--------------------------------------------------------------------
    393 %ifdef USE_AT
    394 ALIGN JUMP_ALIGN
    395 WriteBlockTo16bitDataPort:
    396     xchg    cl, ch      ; Sectors to WORDs
    397     es                  ; Source is ES segment
    398     rep outsw
    399     ret
    400 
    401 ;--------------------------------------------------------------------
    402 ALIGN JUMP_ALIGN
    403 WriteBlockTo32bitDataPort:
    404     shl     cx, 7       ; Sectors to DWORDs
    405     es                  ; Source is ES segment
    406     rep
    407     db      66h         ; Override operand size to 32-bit
    408     db      6Fh         ; OUTSW/OUTSD
    409     ret
    410 %endif ; USE_AT
    411 
    412 
    413225
    414226; Lookup tables to get transfer function based on bus type
    415227ALIGN WORD_ALIGN
    416228g_rgfnPioRead:
     229%ifdef USE_AT
     230        dw      IdePioBlock_ReadFrom16bitDataPort   ; 0, DEVICE_16BIT_ATA
     231        dw      IdePioBlock_ReadFrom32bitDataPort   ; 1, DEVICE_32BIT_ATA
     232%else
     233        dd      0
     234%endif
    417235%ifdef MODULE_8BIT_IDE
    418         dw      0                           ; 0, DEVICE_8BIT_JRIDE_ISA
    419         dw      ReadBlockFrom8bitDataPort   ; 1, DEVICE_8BIT_XTCF
    420     %ifdef USE_186
    421         dw      ReadBlockFrom16bitDataPort  ; 2, DEVICE_8BIT_XTIDE_REV2
    422     %else
    423         dw      ReadBlockFromXtideRev2      ; 2, DEVICE_8BIT_XTIDE_REV2
     236        dw      IdePioBlock_ReadFromXtideRev1       ; 2, DEVICE_8BIT_XTIDE_REV1
     237    %ifndef USE_AT
     238        g_rgfnPioWrite:
    424239    %endif
    425         dw      ReadBlockFromXtideRev1      ; 3, DEVICE_XTIDE_REV1
    426 
    427 %else
    428         times   COUNT_OF_8BIT_IDE_DEVICES   dw  0
    429 %endif
     240        dw      IdePioBlock_ReadFromXtideRev2       ; 3, DEVICE_8BIT_XTIDE_REV2
     241        dw      IdePioBlock_ReadFrom8bitDataPort    ; 4, DEVICE_8BIT_XTCF_PIO8
     242%endif
     243
    430244%ifdef USE_AT
    431         dw      ReadBlockFrom16bitDataPort  ; 4, DEVICE_16BIT_ATA
    432         dw      ReadBlockFrom32bitDataPort  ; 5, DEVICE_32BIT_ATA
    433 %endif
    434 
    435 
    436245g_rgfnPioWrite:
     246        dw      IdePioBlock_WriteTo16bitDataPort    ; 0, DEVICE_16BIT_ATA
     247        dw      IdePioBlock_WriteTo32bitDataPort    ; 1, DEVICE_32BIT_ATA
     248%endif
    437249%ifdef MODULE_8BIT_IDE
    438         dw      0                           ; 0, DEVICE_8BIT_JRIDE_ISA
    439         dw      WriteBlockTo8bitDataPort    ; 1, DEVICE_8BIT_XTCF
    440         dw      WriteBlockToXtideRev2       ; 2, DEVICE_XTIDE_REV2
    441         dw      WriteBlockToXtideRev1       ; 3, DEVICE_XTIDE_REV1
    442 
    443 %else
    444         times   COUNT_OF_8BIT_IDE_DEVICES   dw  0
    445 %endif
    446 %ifdef USE_AT
    447         dw      WriteBlockTo16bitDataPort   ; 4, DEVICE_16BIT_ATA
    448         dw      WriteBlockTo32bitDataPort   ; 5, DEVICE_32BIT_ATA
    449 %endif
     250        dw      IdePioBlock_WriteToXtideRev1        ; 2, DEVICE_8BIT_XTIDE_REV1
     251        dw      IdePioBlock_WriteToXtideRev2        ; 3, DEVICE_8BIT_XTIDE_REV2
     252        dw      IdePioBlock_WriteTo8bitDataPort     ; 4, DEVICE_8BIT_XTCF_PIO8
     253%endif
  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/JrIdeTransfer.asm

    r445 r473  
    2828endstruc
    2929
     30SECTOR_ACCESS_WINDOW_SIZE   EQU     512 ; 512 bytes
     31
    3032
    3133; Section containing code
     
    3739;       AL:     IDE command that was used to start the transfer
    3840;               (all PIO read and write commands including Identify Device)
    39 ;       ES:SI:  Ptr to normalized data buffer
     41;       ES:SI:  Ptr to normalized data buffer (SI 0...15)
    4042;       DS:DI:  Ptr to DPT (in RAMVARS segment)
    4143;       SS:BP:  Ptr to IDEPACK
     
    4951ALIGN JUMP_ALIGN
    5052JrIdeTransfer_StartWithCommandInAL:
    51     push    cs  ; We push CS here (segment of SAW) and later pop it to DS (reads) or ES (writes)
    52 
    53     ; Initialize PIOVARS
    54     xor     cx, cx
    55     mov     [bp+MEMPIOVARS.bSectorsDone], cl
    56     mov     cl, [bp+IDEPACK.bSectorCount]
    57     mov     [bp+MEMPIOVARS.bSectorsLeft], cl
    58     mov     cl, [di+DPT_ATA.bBlockSize]
    59     mov     [bp+MEMPIOVARS.wSectorsInBlock], cx
     53    ; Initialize MEMPIOVARS
     54    xchg    cx, ax          ; IDE command to CL
     55    xor     ax, ax
     56    mov     [bp+MEMPIOVARS.bSectorsDone], al
     57    mov     al, [bp+IDEPACK.bSectorCount]
     58    mov     [bp+MEMPIOVARS.bSectorsLeft], al
     59    mov     al, [di+DPT_ATA.bBlockSize]
     60    mov     [bp+MEMPIOVARS.wSectorsInBlock], ax
    6061    mov     [bp+MEMPIOVARS.fpDPT], di
    6162    mov     [bp+MEMPIOVARS.fpDPT+2], ds
    6263
     64    ; Get far pointer to Sector Access Window
     65    mov     dx, [di+DPT.wBasePort]
     66    cmp     BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_JRIDE_ISA
     67    jne     SHORT .GetSectorAccessWindowForXTCF
     68
     69    ; Get Sector Access Window for JR-IDE/ISA
     70    mov     di, JRIDE_SECTOR_ACCESS_WINDOW_OFFSET
     71    mov     ds, dx      ; Segment for JR-IDE/ISA
     72    jmp     SHORT .SectorAccessWindowLoadedToDSDI
     73
     74.GetSectorAccessWindowForXTCF:
     75    xor     di, di
     76    add     dl, XTCF_CONTROL_REGISTER
     77    in      al, dx                  ; Read high byte for Sector Access Window segment
     78    xchg    ah, al
     79    mov     ds, ax
     80
    6381    ; Are we reading or writing?
    64     test    al, 16  ; Bit 4 is cleared on all the read commands but set on 3 of the 4 write commands
     82.SectorAccessWindowLoadedToDSDI:
     83    test    cl, 16  ; Bit 4 is cleared on all the read commands but set on 3 of the 4 write commands
    6584    jnz     SHORT WriteToSectorAccessWindow
    66     cmp     al, COMMAND_WRITE_MULTIPLE
     85    cmp     cl, COMMAND_WRITE_MULTIPLE
    6786    je      SHORT WriteToSectorAccessWindow
    6887    ; Fall to ReadFromSectorAccessWindow
     
    7190; ReadFromSectorAccessWindow
    7291;   Parameters:
    73 ;       Stack:  Segment part of ptr to Sector Access Window
     92;       DS:DI:  Ptr to Sector Access Window
    7493;       ES:SI:  Normalized ptr to buffer to receive data
    7594;       SS:BP:  Ptr to MEMPIOVARS
     
    84103;--------------------------------------------------------------------
    85104ReadFromSectorAccessWindow:
    86     pop     ds      ; CS -> DS
    87     mov     di, si  ; ES:DI = destination
    88     mov     si, JRIDE_SECTOR_ACCESS_WINDOW_OFFSET   ; DS:SI = source
    89 
     105    xchg    si, di  ; DS:SI = source, ES:DI = Destination
    90106    call    WaitUntilReadyToTransferNextBlock
    91107    jc      SHORT ReturnWithMemoryIOtransferErrorInAH
     
    140156; WriteToSectorAccessWindow
    141157;   Parameters:
    142 ;       Stack:  Segment part of ptr to Sector Access Window
     158;       DS:DI:  Ptr to Sector Access Window
    143159;       ES:SI:  Normalized ptr to buffer containing data
    144160;       SS:BP:  Ptr to MEMPIOVARS
     
    155171WriteToSectorAccessWindow:
    156172    push    es
    157     pop     ds
    158     pop     es  ; CS -> ES
    159     mov     di, JRIDE_SECTOR_ACCESS_WINDOW_OFFSET
     173    push    ds
     174    pop     es      ; ES:DI = Sector Access Window (destination)
     175    pop     ds      ; DS:SI = Ptr to source buffer
    160176
    161177    ; Always poll when writing first block (IRQs are generated for following blocks)
     
    205221ALIGN JUMP_ALIGN
    206222.WriteBlock:
    207     mov     ch, JRIDE_SECTOR_ACCESS_WINDOW_SIZE >> 9
     223    mov     ch, SECTOR_ACCESS_WINDOW_SIZE >> 9
    208224    rep movsw
    209225    mov     di, bx  ; Reset for next sector
     
    232248ALIGN JUMP_ALIGN
    233249.ReadBlock:
    234     mov     ch, JRIDE_SECTOR_ACCESS_WINDOW_SIZE >> 9
     250    mov     ch, SECTOR_ACCESS_WINDOW_SIZE >> 9
    235251    rep movsw
    236252    mov     si, bx  ; Reset for next sector
     
    261277
    262278
    263 %if JRIDE_SECTOR_ACCESS_WINDOW_SIZE <> 512
    264     %error "JRIDE_SECTOR_ACCESS_WINDOW_SIZE is no longer equal to 512. JrIdeTransfer.asm needs changes."
     279%if SECTOR_ACCESS_WINDOW_SIZE <> 512
     280    %error "SECTOR_ACCESS_WINDOW_SIZE is no longer equal to 512. JrIdeTransfer.asm needs changes."
    265281%endif
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