Changeset 399 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc
- Timestamp:
- Apr 19, 2012, 10:39:44 PM (13 years ago)
- google:author:
- krille_n_@hotmail.com
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc
r397 r399 4 4 5 5 ; 6 ; XTIDE Universal BIOS and Associated Tools 6 ; XTIDE Universal BIOS and Associated Tools 7 7 ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. 8 8 ; … … 11 11 ; the Free Software Foundation; either version 2 of the License, or 12 12 ; (at your option) any later version. 13 ; 13 ; 14 14 ; This program is distributed in the hope that it will be useful, 15 15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of 16 16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 ; GNU General Public License for more details. 17 ; GNU General Public License for more details. 18 18 ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html 19 19 ; … … 26 26 ; General Disk Parameter Table related 27 27 .wFlags: 28 .bFlagsLow 29 .bFlagsHigh 30 .bIdevarsOffset 28 .bFlagsLow resb 1 29 .bFlagsHigh resb 1 30 .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive 31 31 32 32 ; IDE Drive related 33 33 ; .bLbaHeads and .twLbaSectors are used for LBA addressing only. 34 .bLbaHeads: 35 .twLbaSectors 34 .bLbaHeads: resb 1 ; Number of LBA assisted heads (1...255) 35 .twLbaSectors resb 2 ; 48-bit sector count for LBA addressing 36 36 37 37 ; .wPchsCylinders and .bPchsSectors are used for CHS addressing only. 38 .wPchsCylinders 38 .wPchsCylinders resb 2 ; Number of P-CHS Cylinders (1...16383) 39 39 .wPchsHeadsAndSectors: 40 .bPchsHeads 41 .bPchsSectors 40 .bPchsHeads resb 1 ; Number of P-CHS heads (1...16) 41 .bPchsSectors resb 1 ; Number of P-CHS Sectors per Track (1...63) 42 42 endstruc 43 43 44 ; Bit definitions for DPT.bFlagsLow45 MASKL_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4)46 FLGL_DPT_SLAVEEQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive47 MASKL_DPT_ADDRESSING_MODEEQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA)48 FLGL_DPT_ENABLE_IRQEQU (1<<7)44 ; Bit definitions for DPT.bFlagsLow 45 MASKL_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...2, P-CHS to L-CHS bit shift count (0...4) 46 FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive 47 MASKL_DPT_ADDRESSING_MODE EQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA) 48 FLGL_DPT_ENABLE_IRQ EQU (1<<7) 49 49 50 ; Bit definitions for DPT.bFlagsHigh 51 FLGH_DPT_REVERSED_A0_AND_A3 EQU (1<<0) ; XTIDE mod, Address lines 0 and 3 reversed 52 FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Use block transfer commands (must be bit 1!) 53 %ifdef MODULE_SERIAL 54 FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Serial Port Device 55 %endif 56 FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Set when waiting for IRQ 50 ; Bit definitions for DPT.bFlagsHigh 51 FLGH_DPT_REVERSED_A0_AND_A3 EQU (1<<0) ; XTIDE mod, Address lines 0 and 3 reversed 52 FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Use block transfer commands (must be bit 1!) 53 FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Serial Port Device 54 FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Set when waiting for IRQ 55 FLGH_DPT_POWER_MANAGEMENT_SUPPORTED EQU (1<<5) 57 56 58 ; IDE device only 59 %ifdef MODULE_ADVANCED_ATA 60 FLGH_DPT_IORDY EQU (1<<7) ; Controller and Drive supports IORDY 61 %endif 57 ; IDE device only 58 FLGH_DPT_IORDY EQU (1<<7) ; Controller and Drive supports IORDY 62 59 63 ; Serial device only64 FLGH_DPT_SERIAL_FLOPPY EQU (1<<4)65 FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h66 FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 560 ; Serial device only 61 FLGH_DPT_SERIAL_FLOPPY EQU (1<<4) 62 FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h 63 FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 5 67 64 68 ; Addressing modes for DPT.wFlags69 ADDRESSING_MODE_FIELD_POSITIONEQU 570 ADDRESSING_MODE_LCHSEQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes)71 ADDRESSING_MODE_PCHSEQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes)72 ADDRESSING_MODE_LBA28EQU 2 ; 28-bit LBA Addressing Mode73 ADDRESSING_MODE_LBA48EQU 3 ; 48-bit LBA Addressing Mode65 ; Addressing modes for DPT.wFlags 66 ADDRESSING_MODE_FIELD_POSITION EQU 5 67 ADDRESSING_MODE_LCHS EQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes) 68 ADDRESSING_MODE_PCHS EQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes) 69 ADDRESSING_MODE_LBA28 EQU 2 ; 28-bit LBA Addressing Mode 70 ADDRESSING_MODE_LBA48 EQU 3 ; 48-bit LBA Addressing Mode 74 71 75 72 76 73 ; DPT for ATA devices 77 74 struc DPT_ATA ; 10 + 2 bytes = 12 bytes 78 .dpt 79 .bBlockSize 80 .bInitError 75 .dpt resb DPT_size 76 .bBlockSize resb 1 ; Current block size in sectors (do not set to zero!) 77 .bInitError resb 1 81 78 endstruc 82 79 83 ; Flags for DPT_ATA.bInitError84 FLG_INITERROR_FAILED_TO_SELECT_DRIVE EQU (1<<0)85 FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS EQU (1<<1)86 FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE EQU (1<<2)87 FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE EQU (1<<3)88 FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE EQU (1<<4)89 FLG_INITERROR_FAILED_TO_SET_PIO_MODE EQU (1<<5)90 80 81 ; Flags for DPT_ATA.bInitError 82 FLG_INITERROR_FAILED_TO_SELECT_DRIVE EQU (1<<0) 83 FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS EQU (1<<1) 84 FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE EQU (1<<2) 85 FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE EQU (1<<3) 86 FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE EQU (1<<4) 87 FLG_INITERROR_FAILED_TO_SET_PIO_MODE EQU (1<<5) 88 FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER EQU (1<<6) 91 89 92 90 ; Additional variables needed to initialize and reset Advanced IDE Controllers. … … 107 105 %ifdef MODULE_SERIAL 108 106 struc DPT_SERIAL 109 .dpt 107 .dpt resb DPT_size 110 108 .wSerialPortAndBaud: 111 .bSerialPort 112 .bSerialBaud 109 .bSerialPort resb 1 ; Serial connection I/O port address, divided by 4 110 .bSerialBaud resb 1 ; Serial connection baud rate divisor 113 111 endstruc 114 112 %endif … … 117 115 ; This is the common size for all DPTs. All DPTs must be equal size. 118 116 %ifdef MODULE_ADVANCED_ATA 119 LARGEST_DPT_SIZEEQU DPT_ADVANCED_ATA_size117 LARGEST_DPT_SIZE EQU DPT_ADVANCED_ATA_size 120 118 %else 121 LARGEST_DPT_SIZEEQU DPT_ATA_size119 LARGEST_DPT_SIZE EQU DPT_ATA_size 122 120 %endif 123 121 124 122 125 ; Number of Sectors per Track is fixed to 63 for LBA assist calculation.126 ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)127 MAX_LCHS_CYLINDERSEQU 1024128 LBA_ASSIST_SPTEQU 63123 ; Number of Sectors per Track is fixed to 63 for LBA assist calculation. 124 ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads) 125 MAX_LCHS_CYLINDERS EQU 1024 126 LBA_ASSIST_SPT EQU 63 129 127 130 128
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