Changeset 276 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS


Ignore:
Timestamp:
Feb 28, 2012, 2:21:03 PM (13 years ago)
Author:
aitotat@…
google:author:
aitotat@gmail.com
Message:

Changes to XTIDE Universal BIOS:

  • Changed version number to 2.0.0
  • Block will no longer be enabled if it is forced off using configurator.
  • Implemented non-working feature to disable drive internal write cache.
Location:
trunk/XTIDE_Universal_BIOS
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/XTIDE_Universal_BIOS/Inc/IdeRegisters.inc

    r158 r276  
    8181
    8282
     83; Subcommands for COMMAND_SET_FEATURES
     84FEATURE_ENABLE_WRITE_CACHE              EQU     02h
     85FEATURE_DISABLE_WRITE_CACHE             EQU     82h     ; Can also be used to flush cache
     86
     87
    8388%endif ; IDEREGISTERS_INC

  • trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc

    r261 r276  
    108108
    109109; Bit defines for DRVPARAMS.wFlags
    110 FLG_DRVPARAMS_USERCHS   EQU (1<<0)  ; User specified P-CHS values
    111 FLG_DRVPARAMS_BLOCKMODE EQU (1<<1)  ; Enable Block mode transfers
    112 FLG_DRVPARAMS_USERLBA   EQU (1<<2)  ; User specified LBA values
     110MASK_DRVPARAMS_WRITECACHE   EQU (3<<0)  ; Drive internal write cache settings (must start at bit 0)
     111FLG_DRVPARAMS_BLOCKMODE     EQU (1<<2)  ; Enable Block mode transfers
     112FLG_DRVPARAMS_USERCHS       EQU (1<<3)  ; User specified P-CHS values
     113FLG_DRVPARAMS_USERLBA       EQU (1<<4)  ; User specified LBA values
     114
     115; Drive Write Cache values for DRVPARAMS.wFlags.MASK_DRVPARAMS_WRITECACHE
     116DEFAULT_WRITE_CACHE         EQU 0       ; Must be 0
     117DISABLE_WRITE_CACHE         EQU 1
     118ENABLE_WRITE_CACHE          EQU 2
     119
     120
    113121
    114122;

  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm

    r267 r276  
    129129
    130130    ; Output Sector Address High (only used by LBA48)
    131     eMOVZX  ax, BYTE [bp+IDEPACK.bLbaLowExt]
     131    eMOVZX  ax, BYTE [bp+IDEPACK.bLbaLowExt]    ; Zero sector count
    132132    mov     cx, [bp+IDEPACK.wLbaMiddleAndHighExt]
    133133    call    IDEDEVICE%+OutputSectorCountAndAddress

  • trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm

    r258 r276  
    3131;--------------------------------------------------------------------
    3232.StoreBlockMode:
    33     mov     al, 1
     33    mov     al, 1                           ; Block mode will be enabled on AH=9h
    3434    mov     ah, [es:si+ATA1.bBlckSize]      ; Max block size in sectors
    3535    mov     [di+DPT_ATA.wSetAndMaxBlock], ax

  • trunk/XTIDE_Universal_BIOS/Src/Handlers/Int13h/AH9h_HInit.asm

    r258 r276  
    4141;--------------------------------------------------------------------
    4242AH9h_InitializeDriveForUse:
     43    push    si
    4344    push    cx
    4445
    … …  
    6364    ; Initialize CHS parameters if LBA is not used
    6465    call    InitializeDeviceParameters
    65     jc      SHORT .RecalibrateDrive
     66    jc      SHORT .SetWriteCache
    6667    and     BYTE [di+DPT.bFlagsHigh], ~FLGH_DPT_RESET_nINITPRMS
     68
     69    ; Enable or Disable Write Cache
     70.SetWriteCache:
     71    ;call   SetWriteCache
    6772
    6873    ; Recalibrate drive by seeking to cylinder 0
    … …  
    8085.ReturnNotSuccessfull:
    8186    pop     cx
     87    pop     si
    8288    ret
    8389
    … …  
    110116
    111117;--------------------------------------------------------------------
     118; SetWriteCache
     119;   Parameters:
     120;       DS:DI:  Ptr to DPT (in RAMVARS segment)
     121;   Returns:
     122;       AH:     BIOS Error code
     123;       CF:     Cleared if succesfull
     124;               Set if any error
     125;   Corrupts registers:
     126;       AL, BX, CX, DX, SI
     127;--------------------------------------------------------------------
     128SetWriteCache:
     129    call    AccessDPT_GetPointerToDRVPARAMStoCSBX
     130    mov     bl, [cs:bx+DRVPARAMS.wFlags]
     131    and     bx, BYTE MASK_DRVPARAMS_WRITECACHE
     132    jz      SHORT ReturnSuccessSinceInitializationNotNeeded     ; DEFAULT_WRITE_CACHE
     133    mov     si, [cs:bx+.rgbWriteCacheCommands]
     134    jmp     AH23h_SetControllerFeatures
     135
     136.rgbWriteCacheCommands:
     137    db      0                               ; DEFAULT_WRITE_CACHE
     138    db      FEATURE_DISABLE_WRITE_CACHE     ; DISABLE_WRITE_CACHE
     139    db      FEATURE_ENABLE_WRITE_CACHE      ; ENABLE_WRITE_CACHE
     140
     141
     142;--------------------------------------------------------------------
    112143; InitializeBlockMode
    113144;   Parameters:
    … …  
    124155    jz      SHORT ReturnSuccessSinceInitializationNotNeeded
    125156
    126     mov     al, [di+DPT_ATA.bMaxBlock]  ; Load max block size, zero AH
     157    call    AccessDPT_GetPointerToDRVPARAMStoCSBX
     158    mov     al, 1                       ; Disable block mode
     159    test    BYTE [cs:bx+DRVPARAMS.wFlags], FLG_DRVPARAMS_BLOCKMODE
     160    eCMOVNZ al, [di+DPT_ATA.bMaxBlock]  ; Load max block size
    127161    jmp     AH24h_SetBlockSize
    128162ReturnSuccessSinceInitializationNotNeeded:
     163    xor     ah, ah
    129164    ret

  • trunk/XTIDE_Universal_BIOS/Src/Main.asm

    r273 r276  
    4444    at  ROMVARS.bRomSize,   db  CNT_ROM_BLOCKS  ; ROM size in 512B blocks
    4545    at  ROMVARS.rgbJump,    jmp Initialize_FromMainBiosRomSearch
    46     at  ROMVARS.rgbSign,    db  "XTIDE120"      ; Signature for flash program
     46    at  ROMVARS.rgbSign,    db  "XTIDE200"      ; Signature for flash program
    4747    at  ROMVARS.szTitle
    4848        db  "-=XTIDE Universal BIOS"
    … …  
    5454        db  " (XT)=-",NULL
    5555%endif
    56     at  ROMVARS.szVersion,  db  "v1.2.0_wip (",__DATE__,")",NULL
     56    at  ROMVARS.szVersion,  db  "v2.0.0_wip (",__DATE__,")",NULL
    5757
    5858;;; For OR'ing into wFlags below
    … …  
    9393    at  ROMVARS.ideVars0+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    9494    at  ROMVARS.ideVars0+IDEVARS.bIRQ,          db  0
    95     at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    96     at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
     95    at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     96    at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
    9797
    9898    at  ROMVARS.ideVars1+IDEVARS.wPort,         dw  170h            ; Controller Command Block base port
    … …  
    100100    at  ROMVARS.ideVars1+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    101101    at  ROMVARS.ideVars1+IDEVARS.bIRQ,          db  0
    102     at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    103     at  ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
     102    at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     103    at  ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
    104104
    105105    at  ROMVARS.ideVars2+IDEVARS.wPort,         dw  DEVICE_XTIDE_DEFAULT_PORT           ; Controller Command Block base port
    … …  
    107107    at  ROMVARS.ideVars2+IDEVARS.bDevice,       db  DEVICE_8BIT_DUAL_PORT_XTIDE
    108108    at  ROMVARS.ideVars2+IDEVARS.bIRQ,          db  0
    109     at  ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    110     at  ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
     109    at  ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     110    at  ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
    111111
    112112    at  ROMVARS.ideVars3+IDEVARS.wPort,         dw  168h            ; Controller Command Block base port
    … …  
    114114    at  ROMVARS.ideVars3+IDEVARS.bDevice,       db  DEVICE_16BIT_ATA
    115115    at  ROMVARS.ideVars3+IDEVARS.bIRQ,          db  0
    116     at  ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    117     at  ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
     116    at  ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     117    at  ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
    118118
    119119%ifdef MODULE_SERIAL
    … …  
    140140%endif
    141141    at  ROMVARS.ideVars0+IDEVARS.bIRQ,          db  0               ; IRQ
    142     at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    143     at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
    144 
    145     at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    146     at  ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
    147 
    148     at  ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    149     at  ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
    150 
    151     at  ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  FLG_DRVPARAMS_BLOCKMODE
    152     at  ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  FLG_DRVPARAMS_BLOCKMODE
     142    at  ROMVARS.ideVars0+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     143    at  ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     144
     145    at  ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     146    at  ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     147
     148    at  ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     149    at  ROMVARS.ideVars2+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     150
     151    at  ROMVARS.ideVars3+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags,  db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
     152    at  ROMVARS.ideVars3+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags,   db  DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE
    153153
    154154%ifdef MODULE_SERIAL
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