| 1 | ; Project name : XTIDE Universal BIOS
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| 2 | ; Description : IDE Register I/O functions.
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| 3 |
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| 4 | ; Section containing code
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| 5 | SECTION .text
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| 6 |
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| 7 | ;--------------------------------------------------------------------
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| 8 | ; IdeIO_OutputALtoIdeRegisterInDL
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| 9 | ; Parameters:
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| 10 | ; AL: Byte to output
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| 11 | ; DL: IDE Register
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| 12 | ; DS:DI: Ptr to DPT (in RAMVARS segment)
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| 13 | ; Returns:
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| 14 | ; Nothing
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| 15 | ; Corrupts registers:
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| 16 | ; BX, DX
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| 17 | ;--------------------------------------------------------------------
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| 18 | ALIGN JUMP_ALIGN
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| 19 | IdeIO_OutputALtoIdeRegisterInDL:
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| 20 | mov bx, IDEVARS.wPort
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| 21 | call GetPortToDXandTranslateA0andA3ifNecessary
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| 22 | out dx, al
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| 23 | ret
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| 24 |
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| 25 |
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| 26 | ;--------------------------------------------------------------------
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| 27 | ; IdeIO_OutputALtoIdeControlBlockRegisterInDL
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| 28 | ; Parameters:
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| 29 | ; AL: Byte to output
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| 30 | ; DL: IDE Control Block Register
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| 31 | ; DS:DI: Ptr to DPT (in RAMVARS segment)
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| 32 | ; Returns:
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| 33 | ; Nothing
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| 34 | ; Corrupts registers:
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| 35 | ; BX, DX
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| 36 | ;--------------------------------------------------------------------
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| 37 | ALIGN JUMP_ALIGN
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| 38 | IdeIO_OutputALtoIdeControlBlockRegisterInDL:
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| 39 | mov bx, IDEVARS.wPortCtrl
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| 40 | call GetPortToDXandTranslateA0andA3ifNecessary
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| 41 | out dx, al
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| 42 | ret
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| 43 |
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| 44 |
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| 45 | ;--------------------------------------------------------------------
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| 46 | ; IdeIO_InputToALfromIdeRegisterInDL
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| 47 | ; Parameters:
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| 48 | ; DL: IDE Register
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| 49 | ; DS:DI: Ptr to DPT (in RAMVARS segment)
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| 50 | ; Returns:
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| 51 | ; AL: Inputted byte
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| 52 | ; Corrupts registers:
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| 53 | ; BX, DX
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| 54 | ;--------------------------------------------------------------------
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| 55 | ALIGN JUMP_ALIGN
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| 56 | IdeIO_InputToALfromIdeRegisterInDL:
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| 57 | mov bx, IDEVARS.wPort
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| 58 | call GetPortToDXandTranslateA0andA3ifNecessary
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| 59 | in al, dx
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| 60 | ret
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| 61 |
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| 62 |
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| 63 | ;--------------------------------------------------------------------
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| 64 | ; GetPortToDXandTranslateA0andA3ifNecessary
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| 65 | ; Parameters:
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| 66 | ; BX: Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl)
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| 67 | ; DL: IDE Register
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| 68 | ; DS:DI: Ptr to DPT (in RAMVARS segment)
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| 69 | ; Returns:
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| 70 | ; DX: Source/Destination Port
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| 71 | ; Corrupts registers:
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| 72 | ; BX
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| 73 | ;--------------------------------------------------------------------
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| 74 | ALIGN JUMP_ALIGN
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| 75 | GetPortToDXandTranslateA0andA3ifNecessary:
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| 76 | xor dh, dh ; DX now has IDE register offset
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| 77 | add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address
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| 78 | add dx, [cs:bx]
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| 79 | test BYTE [di+DPT.bFlagsHigh], FLGH_DPT_REVERSED_A0_AND_A3
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| 80 | jz SHORT .ReturnPortInDX
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| 81 |
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| 82 | ; Exchange address lines A0 and A3 from DL
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| 83 | mov bl, dl
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| 84 | mov bh, MASK_A3_AND_A0_ADDRESS_LINES
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| 85 | and bh, bl ; BH = 0, 1, 8 or 9, we can ignore 0 and 9
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| 86 | jz SHORT .ReturnPortInDX ; Jump out since DH is 0
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| 87 | xor bh, MASK_A3_AND_A0_ADDRESS_LINES
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| 88 | jz SHORT .ReturnPortInDX ; Jump out since DH was 9
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| 89 | and dl, ~MASK_A3_AND_A0_ADDRESS_LINES
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| 90 | or dl, bh ; Address lines now reversed
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| 91 | .ReturnPortInDX:
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| 92 | ret
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