[150] | 1 | ; Project name : XTIDE Universal BIOS |
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| 2 | ; Description : IDE Register I/O functions. |
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| 3 | |
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[376] | 4 | ; |
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[412] | 5 | ; XTIDE Universal BIOS and Associated Tools |
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[376] | 6 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. |
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| 7 | ; |
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| 8 | ; This program is free software; you can redistribute it and/or modify |
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| 9 | ; it under the terms of the GNU General Public License as published by |
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| 10 | ; the Free Software Foundation; either version 2 of the License, or |
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| 11 | ; (at your option) any later version. |
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[412] | 12 | ; |
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[376] | 13 | ; This program is distributed in the hope that it will be useful, |
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| 14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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[412] | 16 | ; GNU General Public License for more details. |
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[376] | 17 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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[412] | 18 | ; |
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[376] | 19 | |
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[150] | 20 | ; Section containing code |
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| 21 | SECTION .text |
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| 22 | |
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| 23 | ;-------------------------------------------------------------------- |
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[332] | 24 | ; IdeIO_OutputALtoIdeControlBlockRegisterInDL |
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[150] | 25 | ; Parameters: |
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| 26 | ; AL: Byte to output |
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[400] | 27 | ; DL: IDE Control Block Register |
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[160] | 28 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 29 | ; Returns: |
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| 30 | ; Nothing |
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| 31 | ; Corrupts registers: |
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[160] | 32 | ; BX, DX |
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[150] | 33 | ;-------------------------------------------------------------------- |
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[332] | 34 | IdeIO_OutputALtoIdeControlBlockRegisterInDL: |
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[414] | 35 | %ifdef MODULE_8BIT_IDE |
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| 36 | mov dh, [di+DPT_ATA.bDevice] |
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| 37 | %ifdef MODULE_JRIDE |
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| 38 | test dh, dh |
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| 39 | jnz SHORT .OutputToIoMappedIde |
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| 40 | |
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| 41 | add dx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET |
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| 42 | jmp SHORT OutputToJrIdeRegister |
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| 43 | .OutputToIoMappedIde: |
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| 44 | %endif ; MODULE_JRIDE |
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| 45 | %endif ; MODULE_8BIT_IDE |
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[400] | 46 | |
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[332] | 47 | mov bl, IDEVARS.wPortCtrl |
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[400] | 48 | jmp SHORT OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL |
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[332] | 49 | |
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[400] | 50 | |
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| 51 | ;-------------------------------------------------------------------- |
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| 52 | ; IdeIO_OutputALtoIdeRegisterInDL |
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| 53 | ; Parameters: |
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| 54 | ; AL: Byte to output |
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| 55 | ; DL: IDE Command Block Register |
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| 56 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 57 | ; Returns: |
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| 58 | ; Nothing |
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| 59 | ; Corrupts registers: |
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| 60 | ; BX, DX |
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| 61 | ;-------------------------------------------------------------------- |
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| 62 | ALIGN JUMP_ALIGN |
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[160] | 63 | IdeIO_OutputALtoIdeRegisterInDL: |
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[414] | 64 | %ifdef MODULE_8BIT_IDE |
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| 65 | mov dh, [di+DPT_ATA.bDevice] |
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| 66 | %ifdef MODULE_JRIDE |
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| 67 | test dh, dh |
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| 68 | jnz SHORT OutputALtoIOmappedIdeRegisterInDL |
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| 69 | |
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| 70 | %if JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET & 0FFh = 0 |
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| 71 | mov dh, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8 |
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| 72 | %else |
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| 73 | add dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET |
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| 74 | %endif |
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| 75 | OutputToJrIdeRegister: |
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| 76 | mov bx, dx |
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| 77 | mov [cs:bx], al |
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| 78 | ret |
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| 79 | ALIGN JUMP_ALIGN |
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| 80 | OutputALtoIOmappedIdeRegisterInDL: |
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| 81 | %endif ; MODULE_JRIDE |
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| 82 | %endif ; MODULE_8BIT_IDE |
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[400] | 83 | |
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[181] | 84 | mov bl, IDEVARS.wPort |
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[400] | 85 | OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL: |
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| 86 | call GetIdePortToDX |
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[150] | 87 | out dx, al |
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| 88 | ret |
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| 89 | |
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| 90 | |
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| 91 | ;-------------------------------------------------------------------- |
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[400] | 92 | ; IdeIO_InputStatusRegisterToAL |
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| 93 | ; Parameters: |
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| 94 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 95 | ; Returns: |
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| 96 | ; AL: IDE Status Register contents |
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| 97 | ; Corrupts registers: |
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| 98 | ; BX, DX |
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| 99 | ;-------------------------------------------------------------------- |
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| 100 | ALIGN JUMP_ALIGN |
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| 101 | IdeIO_InputStatusRegisterToAL: |
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| 102 | mov dl, STATUS_REGISTER_in |
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| 103 | ; Fall to IdeIO_InputToALfromIdeRegisterInDL |
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| 104 | |
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| 105 | ;-------------------------------------------------------------------- |
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[160] | 106 | ; IdeIO_InputToALfromIdeRegisterInDL |
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[150] | 107 | ; Parameters: |
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[160] | 108 | ; DL: IDE Register |
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| 109 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 110 | ; Returns: |
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| 111 | ; AL: Inputted byte |
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| 112 | ; Corrupts registers: |
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[160] | 113 | ; BX, DX |
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[150] | 114 | ;-------------------------------------------------------------------- |
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[160] | 115 | IdeIO_InputToALfromIdeRegisterInDL: |
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[414] | 116 | %ifdef MODULE_8BIT_IDE |
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| 117 | mov dh, [di+DPT_ATA.bDevice] |
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| 118 | %ifdef MODULE_JRIDE |
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| 119 | test dh, dh |
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| 120 | jnz SHORT .InputToALfromIOmappedIdeRegisterInDL |
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| 121 | |
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| 122 | %if JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET & 0FFh = 0 |
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| 123 | mov dh, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET >> 8 |
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| 124 | %else |
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| 125 | add dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET |
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| 126 | %endif |
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| 127 | mov bx, dx |
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| 128 | mov al, [cs:bx] |
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| 129 | ret |
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| 130 | .InputToALfromIOmappedIdeRegisterInDL: |
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| 131 | %endif ; MODULE_JRIDE |
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| 132 | %endif ; MODULE_8BIT_IDE |
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[181] | 133 | mov bl, IDEVARS.wPort |
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[400] | 134 | call GetIdePortToDX |
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[150] | 135 | in al, dx |
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| 136 | ret |
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[160] | 137 | |
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| 138 | |
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| 139 | ;-------------------------------------------------------------------- |
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[400] | 140 | ; GetIdePortToDX |
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[160] | 141 | ; Parameters: |
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[181] | 142 | ; BL: Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl) |
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[400] | 143 | ; DH: Device Type (IDEVARS.bDevice) |
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[160] | 144 | ; DL: IDE Register |
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| 145 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 146 | ; Returns: |
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| 147 | ; DX: Source/Destination Port |
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| 148 | ; Corrupts registers: |
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| 149 | ; BX |
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| 150 | ;-------------------------------------------------------------------- |
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| 151 | ALIGN JUMP_ALIGN |
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[400] | 152 | GetIdePortToDX: |
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| 153 | %ifdef MODULE_8BIT_IDE |
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| 154 | ; Point CS:BX to IDEVARS |
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[181] | 155 | xor bh, bh |
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[400] | 156 | add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address |
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[160] | 157 | |
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[400] | 158 | ; Load port address and check if A0 and A3 address lines need to be reversed |
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| 159 | cmp dh, DEVICE_8BIT_XTIDE_REV1 |
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| 160 | mov dh, bh ; DX now has IDE register offset |
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| 161 | jae SHORT .ReturnUntranslatedPortInDX ; No need to swap address lines |
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| 162 | |
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[160] | 163 | ; Exchange address lines A0 and A3 from DL |
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[400] | 164 | add dx, [cs:bx] ; DX now has port address |
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[160] | 165 | mov bl, dl |
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| 166 | mov bh, MASK_A3_AND_A0_ADDRESS_LINES |
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[400] | 167 | and bh, bl ; BH = 0, 1, 8 or 9, we can ignore 0 and 9 |
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| 168 | jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH is 0 |
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[160] | 169 | xor bh, MASK_A3_AND_A0_ADDRESS_LINES |
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[400] | 170 | jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH was 9 |
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[160] | 171 | and dl, ~MASK_A3_AND_A0_ADDRESS_LINES |
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[400] | 172 | or dl, bh ; Address lines now reversed |
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| 173 | .ReturnTranslatedPortInDX: |
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[160] | 174 | ret |
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[400] | 175 | |
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| 176 | .ReturnUntranslatedPortInDX: |
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| 177 | add dx, [cs:bx] |
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| 178 | ret |
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| 179 | |
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| 180 | %else ; Only standard IDE devices |
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| 181 | xor bh, bh |
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[412] | 182 | add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address |
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[400] | 183 | xor dh, dh |
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[412] | 184 | add dx, [cs:bx] ; DX now has port address |
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[400] | 185 | ret |
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| 186 | %endif |
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