source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDmaBlock.asm@ 547

Last change on this file since 547 was 545, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Integrated XT-CFv3 support by James Pearce.
  • XT-CFv2 memory mapped I/O and DMA modes are no longer supported (but PIO mode is).
File size: 7.7 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : IDE Read/Write functions for transferring
3; block using DMA.
4; These functions should only be called from IdeTransfer.asm.
5
6;
7; XTIDE Universal BIOS and Associated Tools
8; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
9;
10; This program is free software; you can redistribute it and/or modify
11; it under the terms of the GNU General Public License as published by
12; the Free Software Foundation; either version 2 of the License, or
13; (at your option) any later version.
14;
15; This program is distributed in the hope that it will be useful,
16; but WITHOUT ANY WARRANTY; without even the implied warranty of
17; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18; GNU General Public License for more details.
19; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
20;
21
22
23; Section containing code
24SECTION .text
25
26;--------------------------------------------------------------------
27; IdeDmaBlock_WriteToXTCF
28; Parameters:
29; CX: Block size in 512 byte sectors
30; DX: XTCF Base Port Address
31; ES:SI: Physical address to buffer to receive data
32; Returns:
33; Nothing
34; Corrupts registers:
35; AX, BX, CX, DX
36;--------------------------------------------------------------------
37ALIGN JUMP_ALIGN
38IdeDmaBlock_WriteToXTCF:
39 xchg si, di
40 mov bl, CHANNEL_3 | READ | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE
41 call TransferBlockToOrFromXTCF
42 xchg di, si
43 ret
44
45
46;--------------------------------------------------------------------
47; IdeDmaBlock_ReadFromXTCF
48; Parameters:
49; CX: Block size in 512 byte sectors
50; DX: XTCF Base Port Address
51; ES:DI: Physical address to buffer to receive data
52; Returns:
53; Nothing
54; Corrupts registers:
55; AX, BX, CX, DX
56;--------------------------------------------------------------------
57ALIGN JUMP_ALIGN
58IdeDmaBlock_ReadFromXTCF:
59 mov bl, CHANNEL_3 | WRITE | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE
60 ; Fall to TransferBlockToOrFromXTCF
61
62
63;--------------------------------------------------------------------
64; TransferBlockToOrFromXTCF
65; Parameters:
66; BL: Mode byte for DMA Mode Register
67; CX: Block size in 512 byte sectors
68; DX: XTCF Base Port Address
69; ES:DI: Physical address to buffer to receive data
70; Returns:
71; Nothing
72; Corrupts registers:
73; AX, BX, CX, DX
74;--------------------------------------------------------------------
75TransferBlockToOrFromXTCF:
76 ; 8-bit DMA transfers must be done within 64k physical page.
77 ; XT-CF support maximum of 64 sector (32768 bytes) blocks in DMA mode
78 ; so we never need to separate transfer to more than 2 separate DMA operations.
79
80 ; Load XT-CFv3 Control Register port to DX
81 add dl, XTCF_CONTROL_REGISTER
82
83 ; Calculate bytes for first page
84 mov ax, di
85 neg ax ; AX = Max BYTEs for first page
86%ifdef USE_186
87 shl cx, 9 ; CX = Block size in BYTEs
88%else
89 xchg cl, ch
90 shl cx, 1
91%endif
92 cmp cx, ax ; if we won't cross a physical page boundary...
93 jbe SHORT .TransferLastDmaPageWithSizeInCX ; ...perform the transfer in one operation
94
95 ; Calculate how much we can transfer on first and second rounds
96 xchg cx, ax ; CX = BYTEs for first page
97 sub ax, cx ; AX = BYTEs for second page
98 push ax ; Save bytes for second transfer on stack
99
100 ; Transfer first DMA page
101 call StartDMAtransferForXTCFwithDmaModeInBL
102 pop cx ; Pop size for second DMA page
103
104.TransferLastDmaPageWithSizeInCX:
105 ; Fall to StartDMAtransferForXTCFwithDmaModeInBL
106
107
108;--------------------------------------------------------------------
109; StartDMAtransferForXTCFwithDmaModeInBL
110; Updated for XT-CFv3, 11-Apr-13
111; Parameters:
112; BL: Byte for DMA Mode Register
113; CX: Number of BYTEs to transfer (512...32768 since max block size is limited to 64)
114; DX: XT-CFv3 Control Register
115; ES: Bits 3..0 have physical address bits 19..16
116; DI: Physical address bits 15..0
117; Returns:
118; ES:DI updated (CX is added)
119; Corrupts registers:
120; AX
121;--------------------------------------------------------------------
122ALIGN JUMP_ALIGN
123StartDMAtransferForXTCFwithDmaModeInBL:
124 ; Program 8-bit DMA Controller
125 ; Disable Interrupts and DMA Channel 3 during DMA setup
126 mov al, SET_CH3_MASK_BIT
127 cli ; Disable interrupts - programming must be atomic
128 out MASK_REGISTER_DMA8_out, al ; Disable DMA Channel 3
129
130 ; Set DMA Mode (read or write using channel 3)
131 mov al, bl
132 out MODE_REGISTER_DMA8_out, al
133
134 ; Send start address to DMA controller
135 mov ax, es
136 out PAGE_DMA8_CH_3, al
137 mov ax, di
138 out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte
139 out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; Low byte
140 mov al, ah
141 out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; High byte
142
143 ; Set number of bytes to transfer (DMA controller must be programmed number of bytes - 1)
144 mov ax, cx
145 dec ax ; DMA controller is programmed for one byte less
146 out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; Low byte
147 mov al, ah
148 out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; High byte
149
150 ; Enable DMA Channel 3
151 mov al, CLEAR_CH3_MASK_BIT
152 out MASK_REGISTER_DMA8_out, al ; Enable DMA Channel 3
153 sti ; Enable interrupts
154
155 ; XT-CF transfers 16 bytes at a time. We need to manually start transfer for every block by writing (anything)
156 ; to the XT-CFv3 Control Register, which raises DRQ thereby passing system control to the 8237 DMA controller.
157 ; The XT-CFv3 logic releases DRQ after 16 transfers, thereby handing control back to the CPU and allowing any other IRQs or
158 ; DRQs to be serviced (which, on the PC and PC/XT will include DRAM refresh via DMA channel 0). The 16-byte transfers can
159 ; also be interrupted by the DMA controller raising TC (i.e. when done). Each transfer cannot be otherwise interrupted
160 ; and is therefore atomic (and hence fast).
161
162%if 0 ; Slow DMA code - works by checking 8237 status register after each 16-byte transfer, until it reports TC has been raised.
163;ALIGN JUMP_ALIGN
164;.TransferNextBlock:
165; cli ; We want no ISR to read DMA Status Register before we do
166; out dx, al ; Transfer up to 16 bytes to/from XT-CF card
167; in al, STATUS_REGISTER_DMA8_in
168; sti
169; test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT
170; jz SHORT .TransferNextBlock ; All bytes transferred?
171%endif ; Slow DMA code
172
173%if 1 ; Fast DMA code - perform computed number of transfers, then check DMA status register to be sure
174 push cx ; need byte count to update pointer at the end
175 add cx, BYTE 15 ; We'll divide transfers in 16-byte atomic transfers,
176 eSHR_IM cx, 4 ; so include any partial block, which will be terminated
177ALIGN JUMP_ALIGN ; by the DMA controller raising T/C
178.TransferNextDmaBlock:
179 out dx, al ; Transfer up to 16 bytes to/from XT-CF card
180 loop .TransferNextDmaBlock ; dec CX and loop if CX > 0, also adds required wait-state
181 inc cx ; set up CX, in case we need to do an extra iteration
182 in al, STATUS_REGISTER_DMA8_in ; check 8237 DMA controller status flags...
183 test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT ; ... for channel 3 terminal count
184 jz SHORT .TransferNextDmaBlock ; If not set, get more bytes
185 pop cx ; get back requested bytes
186%endif ; Fast DMA code
187
188 ; Update physical address in ES:DI - since IO might need several calls through this function either from here
189 ; if crossing a physical page boundary, and from IdeTransfer.asm if requested sectors was > PIOVARS.wSectorsInBlock
190 mov ax, es ; copy physical page address to ax
191 add di, cx ; add requested bytes to di
192 adc al, 0 ; and increment physical page address, if required
193 mov es, ax ; and save it back in es
194
195 ret
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