source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDmaBlock.asm@ 494

Last change on this file since 494 was 491, checked in by krille_n_@…, 12 years ago

Changes:

  • Added a new define (USE_UNDOC_INTEL) that enables optimizations possible by using undocumented instructions available on all Intel processors and truly compatible clones. AFAIK the only exceptions are the NEC V-series and the Sony CXQ70108 processors so this option should be safe for use on the AT builds.
  • Building BIOSDRVS or the BIOS without MODULE_STRINGS_COMPRESSED would fail due to the recent code exclusions so I changed them a bit. Also fixed the mistaken change to Main.asm
  • Changed the Tandy specific info in Configuration_FullMode.txt so it matches the info in the Wiki.
  • Optimizations and fixes in general.
File size: 6.3 KB
RevLine 
[480]1; Project name : XTIDE Universal BIOS
2; Description : IDE Read/Write functions for transferring
3; block using DMA.
4; These functions should only be called from IdeTransfer.asm.
5
6;
7; XTIDE Universal BIOS and Associated Tools
8; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
9;
10; This program is free software; you can redistribute it and/or modify
11; it under the terms of the GNU General Public License as published by
12; the Free Software Foundation; either version 2 of the License, or
13; (at your option) any later version.
14;
15; This program is distributed in the hope that it will be useful,
16; but WITHOUT ANY WARRANTY; without even the implied warranty of
17; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18; GNU General Public License for more details.
19; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
20;
21
22
23; Section containing code
24SECTION .text
25
26;--------------------------------------------------------------------
27; IdeDmaBlock_WriteToXTCF
28; Parameters:
29; CX: Block size in 512 byte sectors
30; DX: XTCF Base Port Address
31; ES:SI: Physical address to buffer to receive data
32; Returns:
33; Nothing
34; Corrupts registers:
35; AX, BX, CX, DX
36;--------------------------------------------------------------------
37ALIGN JUMP_ALIGN
38IdeDmaBlock_WriteToXTCF:
39 xchg si, di
40 mov bl, CHANNEL_3 | READ | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE
41 call TransferBlockToOrFromXTCF
42 xchg di, si
43 ret
44
45
46;--------------------------------------------------------------------
47; IdeDmaBlock_ReadFromXTCF
48; Parameters:
49; CX: Block size in 512 byte sectors
50; DX: XTCF Base Port Address
51; ES:DI: Physical address to buffer to receive data
52; Returns:
53; Nothing
54; Corrupts registers:
55; AX, BX, CX, DX
56;--------------------------------------------------------------------
57ALIGN JUMP_ALIGN
58IdeDmaBlock_ReadFromXTCF:
59 mov bl, CHANNEL_3 | WRITE | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE
60 ; Fall to TransferBlockToOrFromXTCF
61
62
63;--------------------------------------------------------------------
64; TransferBlockToOrFromXTCF
65; Parameters:
66; BL: Mode byte for DMA Mode Register
67; CX: Block size in 512 byte sectors
68; DX: XTCF Base Port Address
69; ES:DI: Physical address to buffer to receive data
70; Returns:
71; Nothing
72; Corrupts registers:
73; AX, BX, CX, DX
74;--------------------------------------------------------------------
75TransferBlockToOrFromXTCF:
[491]76 ; 8-bit DMA transfers must be done within 64k physical page.
[486]77 ; XT-CF support maximum of 64 sector (32768 bytes) blocks in DMA mode
78 ; so we never need to separate transfer to more than 2 separate DMA operations.
[480]79
80 ; Load XT-CF Control Register port to DX
81 add dl, XTCF_CONTROL_REGISTER
82
83 ; Calculate bytes for first page
84 mov ax, di
85 neg ax ; AX = Max BYTEs for first page
86%ifdef USE_186
87 shl cx, 9 ; CX = Block size in BYTEs
88%else
89 xchg cl, ch
90 shl cx, 1
91%endif
92 cmp cx, ax
93 jbe SHORT .TransferLastDmaPageWithSizeInCX
94
95 ; Push size for second DMA page
96 xchg cx, ax ; CX = BYTEs for first page
97 sub ax, cx ; AX = BYTEs for second page
98 push ax
99
100 ; Transfer first DMA page
101 call StartDMAtransferForXTCFwithDmaModeInBL
102 pop cx ; Pop size for second DMA page
103
104.TransferLastDmaPageWithSizeInCX:
105 ; Fall to StartDMAtransferForXTCFwithDmaModeInBL
106
107
108;--------------------------------------------------------------------
109; StartDMAtransferForXTCFwithDmaModeInBL
110; Parameters:
[482]111; BL: Byte for DMA Mode Register
[486]112; CX: Number of BYTEs to transfer (1...32768 since max block size is limited to 64)
[480]113; DX: XTCF Control Register
114; Returns:
115; Nothing
116; Corrupts registers:
117; AX
118;--------------------------------------------------------------------
119ALIGN JUMP_ALIGN
120StartDMAtransferForXTCFwithDmaModeInBL:
121 ; Program 8-bit DMA Controller
122 ; Disable Interrupts and DMA Channel 3 during DMA setup
123 mov al, SET_CH3_MASK_BIT
124 cli ; Disable interrupts
125 out MASK_REGISTER_DMA8_out, al ; Disable DMA Channel 3
126
127 ; Set DMA Mode (read or write using channel 3)
128 mov al, bl
129 out MODE_REGISTER_DMA8_out, al
130
131 ; Set address to DMA controller
132 out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte
133 mov ax, es
134 out PAGE_DMA8_CH_3, al
135 mov ax, di
136 out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; Low byte
137 mov al, ah
138 out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; High byte
139
140 ; Set number of bytes to transfer (DMA controller must be programmed number of bytes - 1)
141 mov ax, cx
142 dec ax ; DMA controller is programmed for one byte less
143 out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; Low byte
144 mov al, ah
145 out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; High byte
146
147 ; Enable DMA Channel 3
148 mov al, CLEAR_CH3_MASK_BIT
149 out MASK_REGISTER_DMA8_out, al ; Enable DMA Channel 3
150 sti ; Enable interrupts
151
152
[486]153%if 0 ; Slow DMA code
[480]154 ; XT-CF transfers 16 bytes at a time. We need to manually
155 ; start transfer for every block.
156ALIGN JUMP_ALIGN
157.TransferNextBlock:
158 mov al, RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER
159 cli ; We want no ISR to read DMA Status Register before we do
160 out dx, al ; Transfer up to 16 bytes to/from XT-CF card
161 ; * Here XT-CF sets CPU to wait states during transfer *
162 in al, STATUS_REGISTER_DMA8_in
163 sti
164 test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT
165 jz SHORT .TransferNextBlock ; All bytes transferred?
[486]166%endif ; Slow DMA code
[480]167
[486]168
169%if 1 ; Fast DMA code
170 push cx
171 add cx, BYTE 15 ; Include any partial DMA block (since we had to divide transfer to 64k physical pages)
172 eSHR_IM cx, 4 ; Drive Block size to 16 Byte DMA Block Size
173
174.JustOneMoreDmaBlock:
175 mov al, RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER
176ALIGN JUMP_ALIGN
177.TransferNextDmaBlock:
178 out dx, al ; Transfer 16 bytes to/from XT-CF card
179 loop .TransferNextDmaBlock
180
181 inc cx ; set up CX, in case we need to do an extra iteration
182 in al, STATUS_REGISTER_DMA8_in
183 test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT
184 jz SHORT .JustOneMoreDmaBlock ; it wasn't set so get more bytes
185 pop cx
186%endif ; Fast DMA code
187
188
[480]189 ; Restore XT-CF to normal operation
190 mov al, XTCF_DMA_MODE
191 out dx, al
192
193 ; Increment physical address in ES:DI
194 mov ax, es
195 add di, cx
196 adc al, ah
197 mov es, ax
198 ret
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