1 | ; Project name : XTIDE Universal BIOS
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2 | ; Description : Macros for normal I/O mapped ATA controllers.
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3 |
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4 | ;
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5 | ; XTIDE Universal BIOS and Associated Tools
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6 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
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7 | ;
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8 | ; This program is free software; you can redistribute it and/or modify
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9 | ; it under the terms of the GNU General Public License as published by
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10 | ; the Free Software Foundation; either version 2 of the License, or
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11 | ; (at your option) any later version.
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12 | ;
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13 | ; This program is distributed in the hope that it will be useful,
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14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 | ; GNU General Public License for more details.
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17 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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18 | ;
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19 |
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20 | %ifndef IDE_IO_INC
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21 | %define IDE_IO_INC
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22 |
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23 | ;--------------------------------------------------------------------
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24 | ; OUTPUT_AL_TO_IDE_REGISTER
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25 | ; OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER
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26 | ; Parameters:
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27 | ; AL: Byte to output
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28 | ; %1: IDE Register (OUTPUT_AL_TO_IDE_REGISTER)
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29 | ; IDE Control Block Register (OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER)
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30 | ; DS:DI: Ptr to DPT (in RAMVARS segment)
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31 | ; Returns:
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32 | ; Nothing
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33 | ; Corrupts registers:
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34 | ; BX, DX
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35 | ;--------------------------------------------------------------------
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36 | %macro OUTPUT_AL_TO_IDE_REGISTER 1
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37 | %ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
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38 |
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39 | %ifnidni %1, dx
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40 | mov dx, %1
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41 | %endif
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42 | add dx, [di+DPT.wBasePort]
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43 | out dx, al
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44 |
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45 | %else ; Register translations required
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46 |
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47 | %ifnidni %1, dl
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48 | mov dl, %1
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49 | %endif
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50 | call IdeIO_OutputALtoIdeRegisterInDL
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51 |
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52 | %endif
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53 | %endmacro
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54 |
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55 |
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56 | %macro OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER 1
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57 | %ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
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58 |
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59 | %ifnidni %1, dx
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60 | mov dx, %1
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61 | %endif
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62 | eMOVZX bx, BYTE [di+DPT.bIdevarsOffset]
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63 | add dx, [cs:bx+IDEVARS.wControlBlockPort]
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64 | out dx, al
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65 |
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66 | %else ; Register translations required
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67 |
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68 | %ifnidni %1, dl
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69 | mov dl, %1
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70 | %endif
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71 | call IdeIO_OutputALtoIdeControlBlockRegisterInDL
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72 |
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73 | %endif
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74 | %endmacro
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75 |
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76 |
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77 | ;--------------------------------------------------------------------
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78 | ; INPUT_TO_AL_FROM_IDE_REGISTER
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79 | ; Parameters:
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80 | ; %1: IDE Register
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81 | ; DS:DI: Ptr to DPT (in RAMVARS segment)
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82 | ; Returns:
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83 | ; AL: Inputted byte
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84 | ; Corrupts registers:
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85 | ; BX, DX
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86 | ;--------------------------------------------------------------------
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87 | %macro INPUT_TO_AL_FROM_IDE_REGISTER 1
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88 | %ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
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89 |
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90 | %ifnidni %1, dx
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91 | mov dx, %1
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92 | %endif
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93 | add dx, [di+DPT.wBasePort]
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94 | in al, dx
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95 |
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96 | %else ; Register translations required
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97 |
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98 | %ifnidni %1, dl
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99 | mov dl, %1
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100 | %endif
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101 | call IdeIO_InputToALfromIdeRegisterInDL
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102 |
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103 | %endif
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104 | %endmacro
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105 |
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106 |
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107 | ;--------------------------------------------------------------------
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108 | ; UNROLL_SECTORS_IN_CX_TO_DWORDS
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109 | ; UNROLL_SECTORS_IN_CX_TO_QWORDS
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110 | ; UNROLL_SECTORS_IN_CX_TO_OWORDS
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111 | ; Parameters:
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112 | ; CX: Number of sectors in block
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113 | ; Returns:
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114 | ; CX: Number of DWORDs, QWORDs or OWORDs in block
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115 | ; Corrupts registers:
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116 | ; Nothing
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117 | ;--------------------------------------------------------------------
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118 | %macro UNROLL_SECTORS_IN_CX_TO_DWORDS 0
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119 | %ifdef USE_186
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120 | shl cx, 7
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121 | %else
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122 | xchg cl, ch ; Sectors to WORDs (SHL CX, 8)
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123 | shr cx, 1
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124 | %endif
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125 | %endmacro
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126 |
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127 | %macro UNROLL_SECTORS_IN_CX_TO_QWORDS 0
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128 | %ifdef USE_186
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129 | shl cx, 6
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130 | %else
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131 | UNROLL_SECTORS_IN_CX_TO_DWORDS
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132 | shr cx, 1
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133 | %endif
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134 | %endmacro
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135 |
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136 | %macro UNROLL_SECTORS_IN_CX_TO_OWORDS 0
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137 | %ifdef USE_186
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138 | shl cx, 5
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139 | %else
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140 | ; UNROLL_SECTORS_IN_CX_TO_QWORDS
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141 | ; shr cx, 1
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142 | mov ch, cl ; 2 bytes shorter but possibly slower
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143 | mov cl, 3
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144 | shr cx, cl
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145 | %endif
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146 | %endmacro
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147 |
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148 |
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149 | %endif ; IDE_IO_INC
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