source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/IdeIO.inc

Last change on this file was 623, checked in by krille_n_, 22 months ago

Changes:

  • Reversed the change to IdeDPT.asm in r622 as it didn't work as intended.
  • Reordered some procedures to reduce alignment padding.
  • Added two new defines (EXTRA_LOOP_UNROLLING_SMALL and EXTRA_LOOP_UNROLLING_LARGE) that should improve transfer speeds for some hardware combinations, specifically 808x CPUs with any IDE controller using port I/O and any CPU with XT-IDE controllers.
  • Added a new define (USE_086) for use with 8086 and V30 CPUs only. Unlike the other USE_x86 defines, this define will not change the instruction set used and is therefore compatible with all CPUs. However, it will apply padding to make jump destinations WORD aligned which should improve performance on 8086/V30 CPUs but on 8088/V20 CPUs there is no benefit and, in addition to wasting ROM space, it might in fact be slower on these machines. Since the vast majority of XT class machines are using 8088/V20 CPUs this define is not used in the official XT builds - it's primarily intended for custom BIOS builds.
  • XTIDECFG: The URL to the support forum has been updated.
File size: 3.9 KB
Line 
1; Project name  :   XTIDE Universal BIOS
2; Description   :   Macros for normal I/O mapped ATA controllers.
3
4;
5; XTIDE Universal BIOS and Associated Tools
6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
12;
13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16; GNU General Public License for more details.
17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
19
20%ifndef IDE_IO_INC
21%define IDE_IO_INC
22
23;--------------------------------------------------------------------
24; OUTPUT_AL_TO_IDE_REGISTER
25; OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER
26;   Parameters:
27;       AL:     Byte to output
28;       %1:     IDE Register                (OUTPUT_AL_TO_IDE_REGISTER)
29;               IDE Control Block Register  (OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER)
30;       DS:DI:  Ptr to DPT (in RAMVARS segment)
31;   Returns:
32;       Nothing
33;   Corrupts registers:
34;       BX, DX
35;--------------------------------------------------------------------
36%macro OUTPUT_AL_TO_IDE_REGISTER 1
37%ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
38
39    %ifnidni %1, dx
40        mov     dx, %1
41    %endif
42    add     dx, [di+DPT.wBasePort]
43    out     dx, al
44
45%else   ; Register translations required
46
47    %ifnidni %1, dl
48        mov     dl, %1
49    %endif
50    call    IdeIO_OutputALtoIdeRegisterInDL
51
52%endif
53%endmacro
54
55
56%macro OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER 1
57%ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
58
59    eMOVZX  bx, [di+DPT.bIdevarsOffset]
60    %ifnidni %1, dx
61        mov     dx, %1
62    %endif
63    add     dx, [cs:bx+IDEVARS.wControlBlockPort]
64    out     dx, al
65
66%else   ; Register translations required
67
68    %ifnidni %1, dl
69        mov     dl, %1
70    %endif
71    call    IdeIO_OutputALtoIdeControlBlockRegisterInDL
72
73%endif
74%endmacro
75
76
77;--------------------------------------------------------------------
78; INPUT_TO_AL_FROM_IDE_REGISTER
79;   Parameters:
80;       %1:     IDE Register
81;       DS:DI:  Ptr to DPT (in RAMVARS segment)
82;   Returns:
83;       AL:     Inputted byte
84;   Corrupts registers:
85;       BX, DX
86;--------------------------------------------------------------------
87%macro INPUT_TO_AL_FROM_IDE_REGISTER 1
88%ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
89
90    %ifnidni %1, dx
91        mov     dx, %1
92    %endif
93    add     dx, [di+DPT.wBasePort]
94    in      al, dx
95
96%else   ; Register translations required
97
98    %ifnidni %1, dl
99        mov     dl, %1
100    %endif
101    call    IdeIO_InputToALfromIdeRegisterInDL
102
103%endif
104%endmacro
105
106
107;--------------------------------------------------------------------
108; UNROLL_SECTORS_IN_CX_TO_DWORDS
109; UNROLL_SECTORS_IN_CX_TO_QWORDS
110; UNROLL_SECTORS_IN_CX_TO_OWORDS
111;   Parameters:
112;       CX:     Number of sectors in block
113;   Returns:
114;       CX:     Number of DWORDs, QWORDs or OWORDs in block
115;   Corrupts registers:
116;       Nothing
117;--------------------------------------------------------------------
118%macro UNROLL_SECTORS_IN_CX_TO_DWORDS 0
119%ifdef USE_186
120    shl     cx, 7
121%else
122    xchg    cl, ch      ; Sectors to WORDs (SHL CX, 8)
123    shr     cx, 1
124%endif
125%endmacro
126
127%macro UNROLL_SECTORS_IN_CX_TO_QWORDS 0
128%ifdef USE_186
129    shl     cx, 6
130%else
131    UNROLL_SECTORS_IN_CX_TO_DWORDS
132    shr     cx, 1
133%endif
134%endmacro
135
136%macro UNROLL_SECTORS_IN_CX_TO_OWORDS 0
137%ifdef USE_186
138    shl     cx, 5
139%else
140;   UNROLL_SECTORS_IN_CX_TO_QWORDS
141;   shr     cx, 1
142    mov     ch, cl      ; 2 bytes shorter but possibly slower
143    mov     cl, 3
144    shr     cx, cl
145%endif
146%endmacro
147
148%macro UNROLL_SECTORS_IN_CX_TO_16WORDS 0
149%ifdef USE_186
150    shl     cx, 4
151%else
152    mov     ch, cl
153    mov     cl, 4
154    shr     cx, cl
155%endif
156%endmacro
157
158%macro UNROLL_SECTORS_IN_CX_TO_32WORDS 0
159%ifdef USE_186
160    shl     cx, 3
161%else
162    shl     cx, 1
163    shl     cx, 1
164    shl     cx, 1
165%endif
166%endmacro
167
168
169%endif ; IDE_IO_INC
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