source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/IdeIO.inc@ 582

Last change on this file since 582 was 526, checked in by krille_n_@…, 11 years ago

Changes:

  • Update of the copyright notices to include the year 2013.
File size: 2.7 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Macros for normal I/O mapped ATA controllers.
3
4;
5; XTIDE Universal BIOS and Associated Tools
6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
12;
13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
19
20%ifndef IDE_IO_INC
21%define IDE_IO_INC
22
23;--------------------------------------------------------------------
24; OUTPUT_AL_TO_IDE_REGISTER
25; OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER
26; Parameters:
27; AL: Byte to output
28; %1: IDE Register (OUTPUT_AL_TO_IDE_REGISTER)
29; IDE Control Block Register (OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER)
30; DS:DI: Ptr to DPT (in RAMVARS segment)
31; Returns:
32; Nothing
33; Corrupts registers:
34; BX, DX
35;--------------------------------------------------------------------
36%macro OUTPUT_AL_TO_IDE_REGISTER 1
37%ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
38
39 %ifnidni %1, dx
40 mov dx, %1
41 %endif
42 add dx, [di+DPT.wBasePort]
43 out dx, al
44
45%else ; Register translations required
46
47 %ifnidni %1, dl
48 mov dl, %1
49 %endif
50 call IdeIO_OutputALtoIdeRegisterInDL
51
52%endif
53%endmacro
54
55
56%macro OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER 1
57%ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
58
59 %ifnidni %1, dx
60 mov dx, %1
61 %endif
62 eMOVZX bx, BYTE [di+DPT.bIdevarsOffset]
63 add dx, [cs:bx+IDEVARS.wControlBlockPort]
64 out dx, al
65
66%else ; Register translations required
67
68 %ifnidni %1, dl
69 mov dl, %1
70 %endif
71 call IdeIO_OutputALtoIdeControlBlockRegisterInDL
72
73%endif
74%endmacro
75
76
77;--------------------------------------------------------------------
78; INPUT_TO_AL_FROM_IDE_REGISTER
79; Parameters:
80; %1: IDE Register
81; DS:DI: Ptr to DPT (in RAMVARS segment)
82; Returns:
83; AL: Inputted byte
84; Corrupts registers:
85; BX, DX
86;--------------------------------------------------------------------
87%macro INPUT_TO_AL_FROM_IDE_REGISTER 1
88%ifndef MODULE_8BIT_IDE ; Standard IDE controllers only
89
90 %ifnidni %1, dx
91 mov dx, %1
92 %endif
93 add dx, [di+DPT.wBasePort]
94 in al, dx
95
96%else ; Register translations required
97
98 %ifnidni %1, dl
99 mov dl, %1
100 %endif
101 call IdeIO_InputToALfromIdeRegisterInDL
102
103%endif
104%endmacro
105
106
107%endif ; IDE_IO_INC
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