source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/IDE_8bit.inc@ 619

Last change on this file since 619 was 601, checked in by Krister Nordvall, 6 years ago

Changes:

  • Building the BIOS now works again.
  • Added a new IDE device type/transfer mode for use only with XT-IDE rev 2+ (or Chuck(G)-modded rev 1) cards installed in any of the following machines: Olivetti M24, AT&T PC6300, Xerox 6060 and Logabax Persona 1600. This new transfer mode is slightly faster than the regular XT-IDE rev 1 device type and requires that the card is configured for High Speed mode (or, in case of the card being a rev 1 card, has the Chuck(G) mod done). The new device type is called "XTIDE rev 2 (Olivetti M24)" in XTIDECFG.
  • Made some minor improvements to the library code that handles 'Drive Not Ready' errors in XTIDECFG.
  • Optimizations.
File size: 4.9 KB
RevLine 
[150]1; Project name : XTIDE Universal BIOS
[3]2; Description : Macros for accessing data port(s) on 8-bit
3; IDE controllers.
[376]4
5;
[445]6; XTIDE Universal BIOS and Associated Tools
[526]7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
[376]8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
[445]13;
[376]14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
[445]17; GNU General Public License for more details.
[376]18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
[3]21%ifndef IDE_8BIT_INC
22%define IDE_8BIT_INC
23
24;--------------------------------------------------------------------
[152]25; Emulates INSW for XTIDE.
[3]26;
[152]27; XTIDE_INSW
[3]28; Parameters:
[370]29; BL: Bit mask for toggling XTIDE data low/high reg
[152]30; DX: XTIDE Data Low Register address
[3]31; ES:DI: Ptr to destination buffer
32; Returns:
[601]33; DI: Incremented/Decremented for next word
[3]34; Corrupts registers:
35; AL, FLAGS
36;--------------------------------------------------------------------
[152]37%macro XTIDE_INSW 0
[3]38%ifdef USE_186 ; INS instruction available
39 insb ; Load low byte from port DX to [ES:DI]
[370]40 xor dl, bl ; IDE Data Reg to XTIDE Data High Reg
[3]41 insb ; Load high byte from port DX to [ES:DI]
[370]42 xor dl, bl ; Restore to IDE Data Register
[3]43%else ; If 8088/8086
44 in al, dx ; Load low byte from port
[370]45 xor dl, bl ; IDE Data Reg to XTIDE Data High Reg
[3]46 stosb ; Store byte to [ES:DI]
47 in al, dx ; Load high byte from port
[370]48 xor dl, bl ; Restore to IDE Data Register
[3]49 stosb ; Store byte to [ES:DI]
50%endif
51%endmacro
52
53
54;--------------------------------------------------------------------
[152]55; Emulates OUTSW for XTIDE.
[3]56;
[152]57; XTIDE_OUTSW
[3]58; Parameters:
[370]59; BL: Bit mask for toggling XTIDE data low/high reg
[152]60; DX: XTIDE Data Low Register address
[3]61; DS:SI: Ptr to source buffer
62; Returns:
[601]63; SI: Incremented/Decremented for next word
[3]64; Corrupts registers:
65; AX, FLAGS
66;--------------------------------------------------------------------
[152]67%macro XTIDE_OUTSW 0
[3]68%ifdef USE_186 ; OUTS instruction available
69 lodsb ; Load low byte from [DS:SI] to AL
[370]70 xor dl, bl ; IDE Data Reg to XTIDE Data High Reg
[3]71 outsb ; Output high byte from [DS:SI]
[370]72 xor dl, bl ; XTIDE Data High Reg to Data Low Reg
[3]73 out dx, al ; Output low byte from AL
74%else ; If 8088/8086
75 lodsw ; Load word from [DS:SI]
[370]76 xor dl, bl ; IDE Data Reg to XTIDE Data High Reg
[3]77 xchg al, ah ; => AL=high byte, AH=low byte
78 out dx, al ; Output high byte
[370]79 xor dl, bl ; XTIDE Data High Reg to Data Low Reg
[3]80 mov al, ah ; Copy low byte to AL
81 out dx, al ; Output low byte
82%endif
83%endmacro
84
85
[152]86;--------------------------------------------------------------------
87; Emulates OUTSW for modified XTIDE.
88;
89; XTIDE_MOD_OUTSW
90; Parameters:
91; DX: XTIDE Data Low Register address
92; DS:SI: Ptr to source buffer
93; Returns:
[601]94; SI: Incremented/Decremented for next word
[152]95; Corrupts registers:
96; AX, FLAGS
97;--------------------------------------------------------------------
98%macro XTIDE_MOD_OUTSW 0
99%ifdef USE_186 ; OUTS instruction available
100 lodsb ; Load low byte from [DS:SI] to AL
101 inc dx ; IDE Data Reg to XTIDE MOD Data High Reg
102 outsb ; Output high byte from [DS:SI]
103 dec dx ; XTIDE Data High Reg to Data Low Reg
104 out dx, al ; Output low byte from AL
105%else ; If 8088/8086
106 lodsw ; Load word from [DS:SI]
107 inc dx ; IDE Data Reg to XTIDE MOD Data High Reg
108 xchg al, ah ; => AL=high byte, AH=low byte
109 out dx, al ; Output high byte
110 dec dx ; XTIDE Data High Reg to Data Low Reg
111 mov al, ah ; Copy low byte to AL
112 out dx, al ; Output low byte
113%endif
114%endmacro
115
116
[601]117;--------------------------------------------------------------------
118; Emulates INSW for modified XTIDE for use on Olivetti M24 and derivatives.
119;
120; XTIDE_MOD_OLIVETTI_INSW
121; Parameters:
122; DX: XTIDE Data Low Register address
123; ES:DI: Ptr to destination buffer
124; Returns:
125; DI: Incremented/Decremented for next word
126; Corrupts registers:
127; AL, FLAGS
128;--------------------------------------------------------------------
129%macro XTIDE_MOD_OLIVETTI_INSW 0
130%ifdef USE_186 ; INS instruction available
131 insb ; Load low byte from port DX to [ES:DI]
132 inc dx ; IDE Data Reg to XTIDE Data High Reg
133 insb ; Load high byte from port DX to [ES:DI]
134 dec dx ; Restore to IDE Data Register
135%else ; If 8088/8086
136 in al, dx ; Load low byte from port
137 inc dx ; IDE Data Reg to XTIDE Data High Reg
138 stosb ; Store byte to [ES:DI]
139 in al, dx ; Load high byte from port
140 dec dx ; Restore to IDE Data Register
141 stosb ; Store byte to [ES:DI]
142%endif
143%endmacro
144
145
[3]146%endif ; IDE_8BIT_INC
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