source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc@ 465

Last change on this file since 465 was 437, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Changed Fast XTIDE to Lo-tech XT-CF
  • 8-bit PIO Transfer mode is enabled for Lo-tech XT-CF
File size: 5.2 KB
RevLine 
[99]1; Project name : XTIDE Universal BIOS
[3]2; Description : Defines for DPT structs containing custom
3; Disk Parameter Table used by this BIOS.
[376]4
5;
[399]6; XTIDE Universal BIOS and Associated Tools
[376]7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
[399]13;
[376]14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
[399]17; GNU General Public License for more details.
[376]18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
[3]21%ifndef CUSTOMDPT_INC
22%define CUSTOMDPT_INC
23
[150]24; Base DPT for all device types
[422]25struc DPT ; 10 or 18 bytes
[3]26 ; General Disk Parameter Table related
[158]27 .wFlags:
[399]28 .bFlagsLow resb 1
29 .bFlagsHigh resb 1
30 .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive
[422]31 .bInitError resb 1 ; Flags for AH=09h initialization errors
[3]32
[422]33 ; CHS variables
[421]34 .wLchsCylinders resb 2 ; (1...1027, yes 1027)
35 .wLchsHeadsAndSectors:
36 .bLchsHeads resb 1 ; (1...255)
37 .bLchsSectorsPerTrack resb 1 ; (1...63)
[422]38 .bPchsHeads resb 1 ; (1...16)
[238]39
[422]40 ; LBA and remaining P-CHS variables
[421]41%ifdef MODULE_EBIOS
[422]42 .bPchsSectorsPerTrack resb 1
43 .wPchsCylinders resb 2
[421]44 .twLbaSectors resb 6 ; 48-bit sector count for LBA addressing
[422]45%else
46 resb 1 ; Alignment
[421]47%endif
[150]48endstruc
[3]49
[399]50 ; Bit definitions for DPT.bFlagsLow
[421]51 MASKL_DPT_CHS_SHIFT_COUNT EQU (3<<0) ; Bits 0...1, P-CHS to L-CHS bit shift count (0...3)
[422]52 MASKL_DPT_TRANSLATEMODE EQU MASK_DRVPARAMS_TRANSLATEMODE ; Bits 2...3, NORMAL, LARGE or Assisted LBA addressing mode
53 FLGL_DPT_ASSISTED_LBA EQU (1<<(TRANSLATEMODE_FIELD_POSITION+1))
[421]54 FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; Bit 4, Drive is a Slave Drive
[411]55%ifdef MODULE_IRQ
[421]56 FLGL_DPT_ENABLE_IRQ EQU (1<<5) ; Bit 5, Enable IRQ
[411]57%endif
[421]58%ifdef MODULE_EBIOS
59 FLGL_DPT_LBA_AND_EBIOS_SUPPORTED EQU FLG_DRVNHEAD_LBA ; Bit 6, Drive supports LBA and so EBIOS functions can be supported
60 FLGL_DPT_LBA48 EQU (1<<7) ; Bit 7, Drive supports 48-bit LBA (Must be bit 7!)
61%endif
[3]62
[421]63
[399]64 ; Bit definitions for DPT.bFlagsHigh
[421]65 FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Bit 1, Use block transfer commands (must be bit 1!)
[411]66%ifdef MODULE_SERIAL
[421]67 FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Bit 2, Serial Port Device
[411]68%endif
69%ifdef MODULE_IRQ
[421]70 FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Bit 3, Set when waiting for IRQ
[411]71%endif
72%ifdef MODULE_FEATURE_SETS
[421]73 FLGH_DPT_POWER_MANAGEMENT_SUPPORTED EQU (1<<5) ; Bit 4, Drive supports power management
[411]74%endif
75%ifdef MODULE_ADVANCED_ATA
[421]76 FLGH_DPT_IORDY EQU (1<<7) ; Bit 5, Controller and Drive supports IORDY
[411]77%endif
[363]78
[399]79 ; Serial device only
[411]80%ifdef MODULE_SERIAL_FLOPPY
[399]81 FLGH_DPT_SERIAL_FLOPPY EQU (1<<4)
82 FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h
83 FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 5
[411]84%endif
[258]85
[3]86
[422]87 ; Flags for DPT_ADVANCED_ATA.bInitError
88 FLG_INITERROR_FAILED_TO_SELECT_DRIVE EQU (1<<0)
89 FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS EQU (1<<1)
90 FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE EQU (1<<2)
91 FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE EQU (1<<3)
92 FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE EQU (1<<4)
93 FLG_INITERROR_FAILED_TO_SET_PIO_MODE EQU (1<<5)
94 FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER EQU (1<<6)
[437]95 FLG_INITERROR_FAILED_TO_ENABLE_8BIT_PIO_MODE EQU (1<<7)
[363]96
[422]97
98
[363]99; DPT for ATA devices
[422]100struc DPT_ATA ; 10/18 bytes + 2 bytes = 12/20 bytes
[399]101 .dpt resb DPT_size
102 .bBlockSize resb 1 ; Current block size in sectors (do not set to zero!)
[400]103 .bDevice resb 1 ; Device Type from IDEVARS (overrided when 32-bit controller detected)
[363]104endstruc
105
106
[421]107
[364]108; Additional variables needed to initialize and reset Advanced IDE Controllers.
109; EBDA must be reserved for DPTs when using these!
[363]110%ifdef MODULE_ADVANCED_ATA
[422]111struc DPT_ADVANCED_ATA ; 12/20 bytes + 8 bytes = 20/28 bytes
[363]112 .dpt_ata resb DPT_ATA_size
[364]113 .wControllerID resb 2 ; Controller specific ID WORD (from Advanced Controller detection)
[363]114 .wControllerBasePort resb 2 ; Advanced Controller port (not IDE port)
[364]115 .wMinPioCycleTime resb 2 ; Minimum PIO Cycle Time in ns
116 .bPioMode resb 1 ; Best supported PIO mode
[422]117 resb 1
[363]118endstruc
[411]119%endif
[363]120
[400]121
[364]122; DPT for Serial devices
[363]123%ifdef MODULE_SERIAL
[421]124struc DPT_SERIAL ; 8/18 bytes + 2 bytes = 10/20 bytes
[399]125 .dpt resb DPT_size
[363]126 .wSerialPortAndBaud:
[399]127 .bSerialPort resb 1 ; Serial connection I/O port address, divided by 4
128 .bSerialBaud resb 1 ; Serial connection baud rate divisor
[363]129endstruc
130%endif
131
132
133; This is the common size for all DPTs. All DPTs must be equal size.
[364]134%ifdef MODULE_ADVANCED_ATA
[399]135 LARGEST_DPT_SIZE EQU DPT_ADVANCED_ATA_size
[364]136%else
[399]137 LARGEST_DPT_SIZE EQU DPT_ATA_size
[364]138%endif
[363]139
140
[399]141 ; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
142 ; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
143 MAX_LCHS_CYLINDERS EQU 1024
144 LBA_ASSIST_SPT EQU 63
[3]145
[173]146
[3]147%endif ; CUSTOMDPT_INC
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