source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc@ 395

Last change on this file since 395 was 376, checked in by gregli@…, 12 years ago

WIDE checkin... Added copyright and license information to sorce files, as per the GPL instructions for usage.

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[99]1; Project name : XTIDE Universal BIOS
[3]2; Description : Defines for DPT structs containing custom
3; Disk Parameter Table used by this BIOS.
[376]4
5;
6; XTIDE Universal BIOS and Associated Tools
7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17; GNU General Public License for more details.
18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
[3]21%ifndef CUSTOMDPT_INC
22%define CUSTOMDPT_INC
23
[150]24; Base DPT for all device types
[173]25struc DPT ; 10 bytes
[3]26 ; General Disk Parameter Table related
[158]27 .wFlags:
28 .bFlagsLow resb 1
29 .bFlagsHigh resb 1
[150]30 .bIdevarsOffset resb 1 ; Offset to IDEVARS for this drive
[3]31
[150]32 ; IDE Drive related
[238]33 ; .bLbaHeads and .twLbaSectors are used for LBA addressing only.
[237]34 .bLbaHeads: resb 1 ; Number of LBA assisted heads (1...255)
[227]35 .twLbaSectors resb 2 ; 48-bit sector count for LBA addressing
[238]36
37 ; .wPchsCylinders and .bPchsSectors are used for CHS addressing only.
[227]38 .wPchsCylinders resb 2 ; Number of P-CHS Cylinders (1...16383)
39 .wPchsHeadsAndSectors:
40 .bPchsHeads resb 1 ; Number of P-CHS heads (1...16)
41 .bPchsSectors resb 1 ; Number of P-CHS Sectors per Track (1...63)
[150]42endstruc
[3]43
[158]44; Bit definitions for DPT.bFlagsLow
45MASKL_DPT_CHS_SHIFT_COUNT EQU (7<<0) ; Bits 0...3, P-CHS to L-CHS bit shift count (0...4)
46FLGL_DPT_SLAVE EQU FLG_DRVNHEAD_DRV ; (1<<4), Drive is slave drive
47MASKL_DPT_ADDRESSING_MODE EQU (3<<5) ; Bits 5..6, Addressing Mode (bit 6 == FLG_DRVNHEAD_LBA)
48FLGL_DPT_ENABLE_IRQ EQU (1<<7)
[3]49
[158]50; Bit definitions for DPT.bFlagsHigh
51FLGH_DPT_REVERSED_A0_AND_A3 EQU (1<<0) ; XTIDE mod, Address lines 0 and 3 reversed
[165]52FLGH_DPT_BLOCK_MODE_SUPPORTED EQU (1<<1) ; Use block transfer commands (must be bit 1!)
[175]53%ifdef MODULE_SERIAL
[165]54FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Serial Port Device
[175]55%endif
[158]56FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Set when waiting for IRQ
57
[363]58; IDE device only
[364]59%ifdef MODULE_ADVANCED_ATA
[365]60FLGH_DPT_IORDY EQU (1<<7) ; Controller and Drive supports IORDY
[364]61%endif
[363]62
63; Serial device only
[258]64FLGH_DPT_SERIAL_FLOPPY EQU (1<<4)
65FLGH_DPT_SERIAL_FLOPPY_TYPE_MASK EQU 0e0h
66FLGH_DPT_SERIAL_FLOPPY_TYPE_FIELD_POSITION EQU 5
67
[150]68; Addressing modes for DPT.wFlags
69ADDRESSING_MODE_FIELD_POSITION EQU 5
70ADDRESSING_MODE_LCHS EQU 0 ; L-CHS Addressing Mode (NORMAL in many other BIOSes)
71ADDRESSING_MODE_PCHS EQU 1 ; P-CHS Addressing Mode (LARGE in many other BIOSes)
72ADDRESSING_MODE_LBA28 EQU 2 ; 28-bit LBA Addressing Mode
73ADDRESSING_MODE_LBA48 EQU 3 ; 48-bit LBA Addressing Mode
[3]74
[363]75
76; DPT for ATA devices
77struc DPT_ATA ; 10 + 2 bytes = 12 bytes
78 .dpt resb DPT_size
[365]79 .bBlockSize resb 1 ; Current block size in sectors (do not set to zero!)
80 .bInitError resb 1
[363]81endstruc
82
[365]83; Flags for BOOTMENUINFO.wInitErrorFlags
84FLG_INITERROR_FAILED_TO_SELECT_DRIVE EQU (1<<0)
85FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS EQU (1<<1)
86FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE EQU (1<<2)
87FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE EQU (1<<3)
88FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE EQU (1<<4)
89FLG_INITERROR_FAILED_TO_SET_PIO_MODE EQU (1<<5)
[363]90
[365]91
[364]92; Additional variables needed to initialize and reset Advanced IDE Controllers.
93; EBDA must be reserved for DPTs when using these!
[363]94%ifdef MODULE_ADVANCED_ATA
95struc DPT_ADVANCED_ATA
96 .dpt_ata resb DPT_ATA_size
[364]97 .wControllerID resb 2 ; Controller specific ID WORD (from Advanced Controller detection)
[363]98 .wControllerBasePort resb 2 ; Advanced Controller port (not IDE port)
[364]99 .wMinPioCycleTime resb 2 ; Minimum PIO Cycle Time in ns
100 .bPioMode resb 1 ; Best supported PIO mode
101 .bDevice resb 1 ; Device Type from IDEVARS (overrided when 32-bit controller detected)
[363]102endstruc
103%endif
104
105
[364]106; DPT for Serial devices
[363]107%ifdef MODULE_SERIAL
108struc DPT_SERIAL
109 .dpt resb DPT_size
110 .wSerialPortAndBaud:
111 .bSerialPort resb 1 ; Serial connection I/O port address, divided by 4
112 .bSerialBaud resb 1 ; Serial connection baud rate divisor
113endstruc
114%endif
115
116
117; This is the common size for all DPTs. All DPTs must be equal size.
[364]118%ifdef MODULE_ADVANCED_ATA
119LARGEST_DPT_SIZE EQU DPT_ADVANCED_ATA_size
120%else
[363]121LARGEST_DPT_SIZE EQU DPT_ATA_size
[364]122%endif
[363]123
124
[173]125; Number of Sectors per Track is fixed to 63 for LBA assist calculation.
126; 1024 cylinders, 256 heads, 63 sectors = 8.4 GB limit (but DOS does not support more than 255 heads)
127MAX_LCHS_CYLINDERS EQU 1024
128LBA_ASSIST_SPT EQU 63
[3]129
[173]130
[358]131;--------------------------------------------------------------------
132; LIMIT_LBA_CYLINDERS_IN_DXAX_TO_LCHS_CYLINDERS
133; Parameters:
134; DX:AX: Number of LBA cylinders
135; Returns:
136; AX: Number of L-CHS cylinders
137; Corrupts registers:
138; Nothing
139;--------------------------------------------------------------------
140%macro LIMIT_LBA_CYLINDERS_IN_DXAX_TO_LCHS_CYLINDERS 0
141 test dx, dx
142 jnz SHORT %%LoadMaxValueToAX
143 cmp ax, MAX_LCHS_CYLINDERS
[370]144 jb SHORT %%NoNeedToModify
[358]145%%LoadMaxValueToAX:
146 mov ax, MAX_LCHS_CYLINDERS
147%%NoNeedToModify:
148%endmacro
149
150
[3]151%endif ; CUSTOMDPT_INC
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