Changeset 567 in xtideuniversalbios for trunk/Assembly_Library/Src/Serial/SerialServer.asm


Ignore:
Timestamp:
May 26, 2014, 1:25:15 PM (10 years ago)
Author:
krille_n_@…
google:author:
krille_n_@hotmail.com
Message:

Changes:

  • Renamed MODULE_FEATURE_SETS to MODULE_POWER_MANAGEMENT.
  • Renamed MODULE_VERY_LATE_INITIALIZATION to MODULE_VERY_LATE_INIT and removed it from the official builds.
  • Removed the code that skips detection of slave drives on XT-CF controllers since slave drives can be used with Lo-tech ISA CompactFlash boards.
  • Added autodetection of the SVC ADP50L controller to XTIDECFG.
  • The autodetection of XT-CF controllers now requires MODULE_8BIT_IDE_ADVANCED in the loaded BIOS.
  • Fixed a bug in XTIDECFG from r502 where the "Base (cmd block) address" menu option would be displayed when a serial device was selected as the IDE controller.
  • XTIDECFG would display the "Enable interrupt" menu option for the XTIDE r1 but not for the XTIDE r2. It's now displayed for both controller types.
  • Disabled the "Internal Write Cache" menu option in the Master/Slave Drive menus for serial device type drives.
  • Optimizations and other fixes.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/Assembly_Library/Src/Serial/SerialServer.asm

    r566 r567  
    2727; SerialServer_SendReceive:
    2828;   Parameters:
    29 ;       DX:     Packed I/O port and baud rate
     29;       DX:     Packed I/O port and baud rate
    3030;       ES:SI:  Ptr to buffer (for data transfer commands)
    3131;       SS:BP:  Ptr to SerialServer_Command structure
    3232;   Returns:
    3333;       AH:     INT 13h Error Code
    34 ;       CX:     Number of 512-byte blocks transferred
     34;       CX:     Number of 512-byte blocks transferred
    3535;       CF:     Cleared if success, Set if error
    3636;   Corrupts registers:
     
    334334;   Returns:
    335335;       BP/SI:  Checksum for written bytes, compared against ACK from server in .readLoop
    336 ;       CX:     Zero
     336;       CX:     Zero
    337337;       DL:     Receive/Transmit Register address
    338 ;       ES:DI:  Ptr to buffer
     338;       ES:DI:  Ptr to buffer
    339339;   Corrupts registers:
    340340;       AX
     
    401401;   Parameters:
    402402;       AH:     UART_LineStatus bit to test (20h for write, or 1h for read)
    403 ;               One entry point fills in AH with 20h for write
     403;               One entry point fills in AH with 20h for write
    404404;       DX:     Port address (OK if already incremented to UART_lineStatus)
    405 ;       BX:
    406 ;       Stack:  2 words on the stack below the command/count word
     405;       BX:
     406;       Stack:  2 words on the stack below the command/count word
    407407;   Returns:
    408 ;       Returns when desired UART_LineStatus bit is cleared
    409 ;       Jumps directly to error exit if timeout elapses (and cleans up stack)
     408;       Returns when desired UART_LineStatus bit is cleared
     409;       Jumps directly to error exit if timeout elapses (and cleans up stack)
    410410;   Corrupts registers:
    411 ;       AX
     411;       AX
    412412;--------------------------------------------------------------------
    413413
Note: See TracChangeset for help on using the changeset viewer.