source: xtideuniversalbios/trunk/Assembly_Library/Inc/Delay.inc@ 589

Last change on this file since 589 was 568, checked in by krille_n_@…, 10 years ago

Changes:

  • SerDrive: Using named pipe mode (serdrive -p) now works under Windows XP/2000/Server 2003.
  • checksum.pl: Added a compatibility fix for 3Com 3C503 cards.
  • XTIDECFG will now scan every possible segment address to find and load the BIOS and/or its settings from EEPROM. This should simplify things for people using combined option ROMs.
  • Fixed a bug from r521 in BootSector.asm where the BIOS would not display a timeout error if it failed to load the boot sector from harddrive.
  • Fixed a bug from r541 in CompatibleDPT.asm where CompatibleDPT_CreateDeviceParameterTableExtensionToESBXfromDPTinDSSI would generate an invalid checksum in the DPTE.
  • Optimizations and other fixes.
File size: 1.7 KB
RevLine 
[247]1; Project name : Assembly Library
2; Description : Delay macros.
3%ifndef DELAY_INC
4%define DELAY_INC
5
6;--------------------------------------------------------------------
[568]7; Clears prefetch queue by jumping to the next instruction.
8; This delays much more than the nop instruction on fast systems.
[247]9;
10; JMP_DELAY
11; Parameters
12; Nothing
13; Returns:
14; Nothing
15; Corrupts registers:
16; Nothing
17;--------------------------------------------------------------------
18%macro JMP_DELAY 0
19 jmp SHORT %%NextInstruction
20%%NextInstruction:
21%endmacro
22
23
24;--------------------------------------------------------------------
25; Mimimun delays (without fetching) with some CPU architectures:
26; 8088/8086: 17 cycles for jump + 5 cycles for last comparison
27; 286: 10 cycles for jump + 4 cycles for last comparison
28; 386: 13 cycles for jump + ? cycles for last comparison
29; 486: 7 cycles for jump + 6 cycles for last comparison
30;
[287]31; LOOP instruction uses two bytes so aligned fetching will require:
[567]32; 8088: 8 cycles (two BYTE reads)
33; 8086: 4 cycles (one WORD read)
34; 286: 2 cycles + wait states (usually 1)
35; 386: ?
[287]36; 486: Fetched only once to internal cache
37;
38; DELAY_WITH_LOOP_INSTRUCTION_NA ; No JUMP_ALIGN
[247]39; DELAY_WITH_LOOP_INSTRUCTION
40; Parameters
41; CX: Loop iterations (0 is maximum delay with 65536 iterations)
42; Returns:
[287]43; CX: Zero
44; Corrupts registers:
[247]45; Nothing
46;--------------------------------------------------------------------
[287]47%macro DELAY_WITH_LOOP_INSTRUCTION_NA 0
48%%StartOfLoop:
49 loop %%StartOfLoop
50%endmacro
51
[247]52%macro DELAY_WITH_LOOP_INSTRUCTION 0
[287]53ALIGN JUMP_ALIGN
[247]54%%StartOfLoop:
55 loop %%StartOfLoop
56%endmacro
57
58
59%endif ; DELAY_INC
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