- Timestamp:
- Mar 17, 2015, 1:14:17 PM (10 years ago)
- google:author:
- krille_n_@hotmail.com
- Location:
- trunk/XTIDE_Universal_BIOS/Src
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm
r567 r582 119 119 ; Many VLB controllers support PIO modes up to 2. 120 120 call AdvAtaInit_GetControllerMaxPioModeToALandMinPioCycleTimeToBX 121 jn cSHORT .ChangeTo32bitDevice121 jnz SHORT .ChangeTo32bitDevice 122 122 123 123 and BYTE [di+DPT.bFlagsHigh], ~FLGH_DPT_IORDY ; No IORDY supported if need to limit -
trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm
r568 r582 56 56 ; AL: Max supported PIO mode 57 57 ; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise 58 ; BX: Min PIO cycle time (only if CF set)59 ; CF: Set if PIO limit necessary58 ; BX: Min PIO cycle time (only if ZF set) 59 ; ZF: Set if PIO limit necessary 60 60 ; Cleared if no need to limit timings 61 61 ; Corrupts registers: 62 ; (AX if CF cleared)62 ; Nothing 63 63 ;-------------------------------------------------------------------- 64 64 AdvAtaInit_GetControllerMaxPioModeToALandMinPioCycleTimeToBX equ Vision_GetMaxPioModeToALandMinCycleTimeToBX -
trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/Vision.asm
r566 r582 102 102 ; Check if Secondary IDE channel is enabled 103 103 push ax 104 push dx 104 105 add dx, BYTE QD6580_CONTROL_REGISTER 105 106 in al, dx 106 sub dx, BYTE QD6580_CONTROL_REGISTER107 107 test al, FLG_QDCONTROL_SECONDARY_DISABLED_in 108 pop dx 108 109 pop ax 109 110 jz SHORT .CompareBXtoSecondaryIDE … … 131 132 ; AL: Max supported PIO mode 132 133 ; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise 133 ; BX: Min PIO Cycle Time (only if CF set)134 ; CF: Set if PIO limit necessary134 ; BX: Min PIO Cycle Time (only if ZF set) 135 ; ZF: Set if PIO limit necessary 135 136 ; Cleared if no need to limit timings 136 ; Corrupts registers:137 ; (AX if CF cleared)138 137 ; Corrupts registers: 139 138 ; Nothing … … 141 140 Vision_GetMaxPioModeToALandMinCycleTimeToBX: 142 141 cmp ah, ID_QD6500 << 4 143 clc144 142 jne SHORT .NoNeedToLimitForQD6580 145 143 146 144 mov ax, 2 ; Limit to PIO 2 because QD6500 does not support IORDY 147 145 mov bx, PIO_2_MIN_CYCLE_TIME_NS 148 stc149 146 .NoNeedToLimitForQD6580: 150 147 ret … … 167 164 Vision_InitializeWithIDinAHandConfigInAL: 168 165 ; QD6580 has a Control Register that needs to be programmed 166 cmp ah, ID_QD6500 << 4 169 167 mov dx, [di+DPT_ADVANCED_ATA.wControllerBasePort] 170 cmp ah, ID_QD6500 << 4 171 je SHORT .CalculateTimingForQD6500 168 mov bp, QD6500_MAX_ACTIVE_TIME_CLOCKS | (QD6500_MIN_ACTIVE_TIME_CLOCKS << 8) ; Assume QD6500 169 je SHORT .CalculateTimingsForQD65xx 170 mov bp, QD6580_MAX_ACTIVE_TIME_CLOCKS | (QD6580_MIN_ACTIVE_TIME_CLOCKS << 8) ; It's a QD6580 172 171 173 172 ; Program QD6580 Control Register (not available on QD6500) to 174 173 ; Enable or Disable Read-Ahead and Post-Write Buffer to match 175 174 ; jumper setting on the multi I/O card. 176 xor ax, ax177 175 add dx, BYTE QD6580_CONTROL_REGISTER 178 in al, dx 176 in al, dx ; Read to get ATAPI jumper status 179 177 test al, FLG_QDCONTROL_HDONLY_in 180 eCMOVNZ ah, FLG_QDCONTROL_NONATAPI ; Enable Read-Ahead and Post-Write Buffers 181 mov al, ah 182 or al, MASK_QDCONTROL_FLAGS_TO_SET 178 mov al, MASK_QDCONTROL_FLAGS_TO_SET 179 eCMOVNZ al, FLG_QDCONTROL_NONATAPI | MASK_QDCONTROL_FLAGS_TO_SET ; Enable Read-Ahead and Post-Write Buffers 183 180 out dx, al 184 sub dx, BYTE QD6580_CONTROL_REGISTER181 dec dx ; Secondary Channel IDE Timing Register 185 182 186 183 ; Now we need to determine is the drive connected to the Primary or Secondary channel. 187 184 ; QD6500 has only one channel that can be Primary at 1F0h or Secondary at 170h. 188 185 ; QD6580 always has Primary channel at 1F0h. Secondary channel at 170h can be Enabled or Disabled. 189 cmp WORD [di+DPT.wBasePort], DEVICE_ATA_PRIMARY_PORT 190 je SHORT .CalculateTimingTicksForQD6580 ; Primary Channel so no need to modify DX 191 times 2 inc dx ; Secondary Channel IDE Timing Register 192 193 ; QD6500 and QD6580 require slightly different calculations. 194 .CalculateTimingTicksForQD6580: 195 mov bp, QD6580_MAX_ACTIVE_TIME_CLOCKS | (QD6580_MIN_ACTIVE_TIME_CLOCKS << 8) 196 jmp SHORT .CalculateTimingsForQD65xx 197 198 .CalculateTimingForQD6500: 199 mov bp, QD6500_MAX_ACTIVE_TIME_CLOCKS | (QD6500_MIN_ACTIVE_TIME_CLOCKS << 8) 186 cmp BYTE [di+DPT.wBasePort], DEVICE_ATA_SECONDARY_PORT & 0FFh 187 je SHORT .CalculateTimingsForQD65xx ; Secondary Channel so no need to modify DX 188 dec dx 189 dec dx ; Primary Channel IDE Timing Register 200 190 201 191 ; We need the PIO Cycle Time in CX to calculate Active and Recovery Times.
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