Changeset 558 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc

Timestamp:

Jun 23, 2013, 3:52:31 PM (12 years ago)

Author:

krille_n_@…

google:author:

krille_n_@hotmail.com

Message:

Changes:

• Building the BIOS Drive Information Tool now works again.
• Moved all XT-CF related code to MODULE_8BIT_IDE_ADVANCED. I don't see how an XT-CF card could work without *_ADVANCED anyway but if I'm wrong, feel free to undo this. Note! The autodetection code in XTIDECFG has NOT been changed to reflect this (still relies on MODULE_8BIT_IDE).
• Optimizations and fixes in general.

Location:

trunk/XTIDE_Universal_BIOS/Inc

Files:

• Controllers/Vision.inc (modified) (1 diff)
• Controllers/XTCF.inc (modified) (4 diffs)
• RomVars.inc (modified) (1 diff)

trunk/XTIDE_Universal_BIOS/Inc/Controllers/Vision.inc

@@ -28 +28 @@
 QD65XX_BASE_PORT                    EQU     30h
 QD65XX_ALTERNATIVE_BASE_PORT        EQU     0B0h    ; This is the default setting but Intel PIIX4 South Bridge
-                                                    ; (and likely other PCI chisets as well) mirror PIC registers here
+                                                    ; (and likely other PCI chipsets as well) mirror PIC registers here
 
 ; Vision Register offsets from QD chip base port

trunk/XTIDE_Universal_BIOS/Inc/Controllers/XTCF.inc

@@ -26 +26 @@
 %define XTCF_INC
 
-; XT-CF requires that block must be less than 128 sectors (64 kiB) for DMA
-; transfers.
-; 
+; XT-CF requires that block must be less than 128 sectors (64 kiB) for DMA transfers.
+;
 ; Note: XT-CFv3 DMA will not interfere with PC & PC/XT memory refresh,
 ; since the XT-CFv3 detaches itself from the bus every 16 bytes transferred.
@@ -59 +58 @@
 ; XT-CFv3 cannot be distinguised by software, so user must decide and set
 ; the mode via a call to Int 13h function 1Eh accordingly (see AH1E_XTCF.asm).
-;;
+;
 XTCF_8BIT_PIO_MODE                  EQU     00h
 XTCF_8BIT_PIO_MODE_WITH_BIU_OFFLOAD EQU     01h
@@ -80 +79 @@
 ; SET_XTCF_TRANSFER_MODE
 ;   Parameters:
-;       DH:     Mode to select,
-;                               i.e. XTCF_8BIT_PIO_MODE
-;               Note there's no way to know if an
-;               XT-CF adapter supports DMA, so the
-;               user should enable DMA only if a
-;               DMA-enabled XT-CFv3 is fitted.
+;       DH:     Mode to select, i.e. XTCF_8BIT_PIO_MODE
+;               Note there's no way to know if an XT-CF adapter
+;               supports DMA, so the user should enable DMA
+;               only if a DMA-enabled XT-CFv3 is fitted.
 ;       DL:     Drive Number
 ;--------------------------------------------------------------------
@@ -95 +92 @@
 ;       DL:     Drive Number
 ;   Returns:
-;       DL:     Block mode sectors per block
-;               configured
 ;       DH:     One of the mode values listed above,
-;                               i.e. XTCF_8BIT_PIO_MODE
+;               i.e. XTCF_8BIT_PIO_MODE
+;       DL:     Block mode sectors per block configured
 ;--------------------------------------------------------------------
 GET_XTCF_TRANSFER_MODE              EQU     2

trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc

@@ -121 +121 @@
 STANDARD_CONTROL_BLOCK_OFFSET           EQU     200h
 XTIDE_CONTROL_BLOCK_OFFSET              EQU     8h      ; for XTIDE, A3 is used to control selected register (CS0 vs CS1)...
-XTCF_CONTROL_BLOCK_OFFSET               EQU     10h     ; ...and for XT-CF (all varients), it's A4
+XTCF_CONTROL_BLOCK_OFFSET               EQU     10h     ; ...and for XT-CF (all variants), it's A4
 ADP50L_CONTROL_BLOCK_OFFSET             EQU     10h