Changeset 540 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc
- Timestamp:
- Apr 13, 2013, 3:40:27 PM (12 years ago)
- google:author:
- aitotat@gmail.com
- Location:
- trunk/XTIDE_Universal_BIOS/Inc
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Inc/Controllers/Vision.inc
r526 r540 27 27 ; Possible base addresses for QD6500 and QD6580 28 28 QD65XX_BASE_PORT EQU 30h 29 QD65XX_ALTERNATIVE_BASE_PORT EQU 0B0h 30 29 QD65XX_ALTERNATIVE_BASE_PORT EQU 0B0h ; This is the default setting but Intel PIIX4 South Bridge 30 ; (and likely other PCI chisets as well) mirror PIC registers here 31 31 32 32 ; Vision Register offsets from QD chip base port -
trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc
r536 r540 66 66 %ifdef MODULE_SERIAL 67 67 FLGH_DPT_SERIAL_DEVICE EQU (1<<2) ; Bit 2, Serial Port Device 68 %endif69 %ifdef MODULE_IRQ70 FLGH_DPT_INTERRUPT_IN_SERVICE EQU (1<<3) ; Bit 3, Set when waiting for IRQ71 68 %endif 72 69 %ifdef MODULE_FEATURE_SETS
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