Changeset 501 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Device/IDE

Timestamp:

Jan 26, 2013, 4:58:50 PM (12 years ago)

Author:

aitotat@…

google:author:

aitotat@gmail.com

Message:

Changes to XTIDE Universal BIOS:

• XTIDE rev 2 and modded XTIDE rev 1 work again (fixed A0<->A3 swap when accessing Control Block Registers).
• System INT 13h handler is no longer copied to INT 40h (testing if something uses INT 40h).
• Removed controller hardware reset: now AH=0h and AH=Dh will only re-initialize drives (SB16 Tertiary and Quaternary IDE should now be safe to use when using Secondary IDE).

Location:

trunk/XTIDE_Universal_BIOS/Src/Device/IDE

Files:

• IdeCommand.asm (modified) (1 diff)
• IdeIO.asm (modified) (5 diffs)

trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm

@@ -20 +20 @@
 ; Section containing code
 SECTION .text
-
-;--------------------------------------------------------------------
-; IdeCommand_ResetMasterAndSlaveController
-;   Parameters:
-;       DS:DI:  Ptr to DPT (in RAMVARS segment)
-;   Returns:
-;       AH:     INT 13h Error Code
-;       CF:     Cleared if success, Set if error
-;   Corrupts registers:
-;       AL, BX, CX, DX
-;--------------------------------------------------------------------
-IdeCommand_ResetMasterAndSlaveController:
-    ; HSR0: Set_SRST
-    call    AccessDPT_GetDeviceControlByteToAL
-    or      al, FLG_DEVCONTROL_SRST | FLG_DEVCONTROL_nIEN   ; Set Reset bit
-    OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER     DEVICE_CONTROL_REGISTER_out
-    mov     ax, HSR0_RESET_WAIT_US
-    call    Timer_DelayMicrosecondsFromAX
-
-    ; HSR1: Clear_wait
-    call    AccessDPT_GetDeviceControlByteToAL
-    or      al, FLG_DEVCONTROL_nIEN
-    and     al, ~FLG_DEVCONTROL_SRST                        ; Clear reset bit
-    OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER     DEVICE_CONTROL_REGISTER_out
-    mov     ax, HSR1_RESET_WAIT_US
-    call    Timer_DelayMicrosecondsFromAX
-
-    ; HSR2: Check_status
-    mov     bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MAXIMUM, FLG_STATUS_BSY)
-    jmp     IdeWait_PollStatusFlagInBLwithTimeoutInBH
-
 
 ;--------------------------------------------------------------------

trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm

@@ -77 +77 @@
 
 .ShlRegisterIndexInDX:
-    eSHL_IM dx, 1
+    shl     dx, 1
     ; Fall to .InputToALfromRegisterInDX
 
@@ -98 +98 @@
 ;--------------------------------------------------------------------
 IdeIO_OutputALtoIdeControlBlockRegisterInDL:
-    ; Note! We do not need to reverse A0 and A3 for XTIDE rev 2 since
-    ; the only Control Block Register we access is DEVICE_CONTROL_REGISTER_out
-    ; at offset 6 (0110b).
     xor     dh, dh  ; IDE Register index now in DX
 
     mov     bl, [di+DPT_ATA.bDevice]
     cmp     bl, DEVICE_8BIT_XTIDE_REV2
-    jbe     SHORT .OutputALtoControlBlockRegisterInDX   ; Standard IDE controllers and XTIDE rev 1
+    je      SHORT .ReverseA0andA3fromRegisterIndexInDX
+    jb      SHORT .OutputALtoControlBlockRegisterInDX   ; Standard IDE controllers and XTIDE rev 1
 
 %ifdef MODULE_8BIT_IDE_ADVANCED
@@ -117 +115 @@
 %endif
 
+.ReverseA0andA3fromRegisterIndexInDX:
+    ; We cannot use lookup table since A3 will be always set because
+    ; Control Block Registers start from Command Block + 8h. We can do
+    ; a small trick since we only access Device Control Register at
+    ; offset 6h: Always clear A3 and set A0.
+    add     dx, [cs:bx+IDEVARS.wControlBlockPort]
+    xor     dl, 1001b                       ; Clear A3, Set A0
+    jmp     SHORT OutputALtoPortInDX
+
 .ShlRegisterIndexInDX:
     add     dl, XTCF_CONTROL_BLOCK_OFFSET
-    eSHL_IM dx, 1
+    shl     dx, 1
     jmp     SHORT OutputALtoRegisterInDX
 
@@ -163 +170 @@
     ret
 %endif
-        
+
 .ReverseA0andA3fromRegisterIndexInDX:
     mov     bx, dx
@@ -170 +177 @@
 
 .ShlRegisterIndexInDX:
-    eSHL_IM dx, 1
+    shl     dx, 1
     ; Fall to OutputALtoRegisterInDX