Changeset 491 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc/Controllers


Ignore:
Timestamp:
Dec 15, 2012, 2:46:29 PM (11 years ago)
Author:
krille_n_@…
google:author:
krille_n_@hotmail.com
Message:

Changes:

  • Added a new define (USE_UNDOC_INTEL) that enables optimizations possible by using undocumented instructions available on all Intel processors and truly compatible clones. AFAIK the only exceptions are the NEC V-series and the Sony CXQ70108 processors so this option should be safe for use on the AT builds.
  • Building BIOSDRVS or the BIOS without MODULE_STRINGS_COMPRESSED would fail due to the recent code exclusions so I changed them a bit. Also fixed the mistaken change to Main.asm
  • Changed the Tandy specific info in Configuration_FullMode.txt so it matches the info in the Wiki.
  • Optimizations and fixes in general.
File:
1 edited

Legend:

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  • trunk/XTIDE_Universal_BIOS/Inc/Controllers/XTCF.inc

    r487 r491  
    55
    66;
    7 ; XTIDE Universal BIOS and Associated Tools 
     7; XTIDE Universal BIOS and Associated Tools
    88; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
    99;
    … …  
    1212; the Free Software Foundation; either version 2 of the License, or
    1313; (at your option) any later version.
    14 ; 
     14;
    1515; This program is distributed in the hope that it will be useful,
    1616; but WITHOUT ANY WARRANTY; without even the implied warranty of
    1717; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    18 ; GNU General Public License for more details.     
     18; GNU General Public License for more details.
    1919; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
    2020;
    … …  
    3434; Possible base addresses. Note that all XT-CF IDE registers are SHL 1 compared
    3535; to standard IDE registers.
     36XTCF_BASE_PORT_DETECTION_SEED       EQU     140h    ; Not a valid base address but needed for autodetection
    3637XTCF_BASE_PORT_1                    EQU     200h
    3738XTCF_BASE_PORT_2                    EQU     240h
    … …  
    4243; XT-CF Control Register (do not SHL 1 these!)
    4344XTCF_CONTROL_REGISTER               EQU     1Fh
    44 XTCT_CONTROL_REGISTER_INVERTED_in   EQU     1Eh
     45XTCF_CONTROL_REGISTER_INVERTED_in   EQU     1Eh
    4546
    4647; Control Register contents:
    … …  
    4849; Control Register holds high byte from Sector Window segment if >= A0h
    4950; (First possible segment for Sector Window is A000h)
    50 ; 
     51;
    5152; 8-bit PIO transfers (port I/O) are used if Control Register is zero.
    5253; Any other value means DMA transfers (using DMA channel 3).
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