Changeset 485 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src
- Timestamp:
- Oct 28, 2012, 12:45:14 PM (12 years ago)
- google:author:
- aitotat@gmail.com
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Src/Main.asm
r480 r485 82 82 at ROMVARS.wBootTimeout, dw BOOT_MENU_DEFAULT_TIMEOUT 83 83 %endif 84 at ROMVARS.bIdeCnt, db 3; Number of supported controllers84 at ROMVARS.bIdeCnt, db 2 ; Number of supported controllers 85 85 at ROMVARS.bBootDrv, db 80h ; Boot Menu default drive 86 86 at ROMVARS.bMinFddCnt, db 0 ; Do not force minimum number of floppy drives … … 95 95 at ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags, dw DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION) 96 96 97 at ROMVARS.ideVars1+IDEVARS.bXTCFcontrolRegister, db 0 98 at ROMVARS.ideVars1+IDEVARS.bDevice, db DEVICE_8BIT_XTCF_PIO8 99 ;at ROMVARS.ideVars1+IDEVARS.wBasePort, dw DEVICE_ATA_SECONDARY_PORT 100 ;at ROMVARS.ideVars1+IDEVARS.wControlBlockPort, dw DEVICE_ATA_SECONDARY_PORTCTRL 101 ;at ROMVARS.ideVars1+IDEVARS.bDevice, db DEVICE_16BIT_ATA 102 ;at ROMVARS.ideVars1+IDEVARS.bIRQ, db 0 97 at ROMVARS.ideVars1+IDEVARS.wBasePort, dw DEVICE_ATA_SECONDARY_PORT 98 at ROMVARS.ideVars1+IDEVARS.wControlBlockPort, dw DEVICE_ATA_SECONDARY_PORTCTRL 99 at ROMVARS.ideVars1+IDEVARS.bDevice, db DEVICE_16BIT_ATA 100 at ROMVARS.ideVars1+IDEVARS.bIRQ, db 0 103 101 at ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags, dw DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION) 104 102 at ROMVARS.ideVars1+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags, dw DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION) 105 103 106 ;at ROMVARS.ideVars2+IDEVARS.wBasePort, dw DEVICE_ATA_TERTIARY_PORT 107 ;at ROMVARS.ideVars2+IDEVARS.wControlBlockPort, dw DEVICE_ATA_TERTIARY_PORTCTRL 108 ;at ROMVARS.ideVars2+IDEVARS.bDevice, db DEVICE_16BIT_ATA 109 at ROMVARS.ideVars2+IDEVARS.wBasePort, dw 0D800h 110 at ROMVARS.ideVars2+IDEVARS.wControlBlockPort, dw 0 111 at ROMVARS.ideVars2+IDEVARS.bDevice, db DEVICE_8BIT_JRIDE_ISA 104 at ROMVARS.ideVars2+IDEVARS.wBasePort, dw DEVICE_ATA_TERTIARY_PORT 105 at ROMVARS.ideVars2+IDEVARS.wControlBlockPort, dw DEVICE_ATA_TERTIARY_PORTCTRL 106 at ROMVARS.ideVars2+IDEVARS.bDevice, db DEVICE_16BIT_ATA 112 107 at ROMVARS.ideVars2+IDEVARS.bIRQ, db 0 113 108 at ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags, dw DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION) … … 145 140 at ROMVARS.ideVars0+IDEVARS.drvParamsSlave+DRVPARAMS.wFlags, db DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION) 146 141 147 at ROMVARS.ideVars1+IDEVARS.bXTCFcontrolRegister, db 0142 at ROMVARS.ideVars1+IDEVARS.bXTCFcontrolRegister, db XTCF_8BIT_PIO_MODE 148 143 at ROMVARS.ideVars1+IDEVARS.bDevice, db DEVICE_8BIT_XTCF_PIO8 149 144 at ROMVARS.ideVars1+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags, db DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE | (TRANSLATEMODE_AUTO<<TRANSLATEMODE_FIELD_POSITION)
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