Changeset 443 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Device/IDE
- Timestamp:
- Aug 25, 2012, 2:48:40 PM (12 years ago)
- google:author:
- aitotat@gmail.com
- Location:
- trunk/XTIDE_Universal_BIOS/Src/Device/IDE
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm
r442 r443 63 63 ; CF: Cleared if success, Set if error 64 64 ; Corrupts registers: 65 ; AL, B L, CX, DX, SI, DI, ES65 ; AL, BX, CX, DX, SI, DI, ES 66 66 ;-------------------------------------------------------------------- 67 67 IdeCommand_IdentifyDeviceToBufferInESSIwithDriveSelectByteInBH: … … 74 74 call IdeDPT_StoreDeviceTypeFromIdevarsInCSBPtoDPTinDSDI 75 75 76 ; Wait until drive motors have reached maxspeed76 ; Wait until drive motors have reached full speed 77 77 cmp bp, BYTE ROMVARS.ideVars0 ; First controller? 78 78 jne SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster … … 88 88 %ifdef MODULE_8BIT_IDE 89 89 ; Enable 8-bit PIO mode for Lo-tech XT-CF 90 push si 90 91 call AH9h_Enable8bitPioModeForXTCF 92 pop si 91 93 jc SHORT .FailedToSet8bitMode 92 94 %endif … … 100 102 ; Clean stack and return 101 103 .FailedToSet8bitMode: 102 lea sp, [bp+ EXTRA_BYTES_FOR_INTPACK] ; This assumes BP hasn't changed between Idepack_FakeToSSBP and here104 lea sp, [bp+SIZE_OF_IDEPACK_WITHOUT_INTPACK] ; This assumes BP hasn't changed between Idepack_FakeToSSBP and here 103 105 pop bp 104 106 ret -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm
r414 r443 163 163 ; Exchange address lines A0 and A3 from DL 164 164 add dx, [cs:bx] ; DX now has port address 165 mov bl, dl 166 mov bh, MASK_A3_AND_A0_ADDRESS_LINES 167 and bh, bl ; BH = 0, 1, 8 or 9, we can ignore 0 and 9 168 jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH is 0 169 xor bh, MASK_A3_AND_A0_ADDRESS_LINES 170 jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH was 9 171 and dl, ~MASK_A3_AND_A0_ADDRESS_LINES 172 or dl, bh ; Address lines now reversed 165 mov bl, dl ; Port low byte to BL 166 and bl, MASK_A3_AND_A0_ADDRESS_LINES ; Clear all bits except A0 and A3 167 jz SHORT .ReturnTranslatedPortInDX ; A0 and A3 both zeroes, no change needed 168 cmp bl, MASK_A3_AND_A0_ADDRESS_LINES 169 je SHORT .ReturnTranslatedPortInDX ; A0 and A3 both ones, no change needed 170 xor dl, MASK_A3_AND_A0_ADDRESS_LINES ; Invert A0 and A3 173 171 .ReturnTranslatedPortInDX: 174 172 ret
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