Changeset 422 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Inc

Timestamp:

May 12, 2012, 1:58:25 PM (13 years ago)

Author:

aitotat@…

google:author:

aitotat@gmail.com

Message:

Changes to XTIDE Universal BIOS:

• Modified ROMVARS for user defined CHS translation mode.
• Base DPT struct now includes initialization error flags again.

Location:

trunk/XTIDE_Universal_BIOS/Inc

Files:

• BootVars.inc (modified) (1 diff)
• CustomDPT.inc (modified) (7 diffs)
• RomVars.inc (modified) (1 diff)

trunk/XTIDE_Universal_BIOS/Inc/BootVars.inc

@@ -63 +63 @@
 
 struc DRVDETECTINFO
+    .StartOfDrvDetectInfo:
     .szDrvName              resb    MAX_HARD_DISK_NAME_LENGTH
                             resb    2   ; Zero word (ensures string terminates)
     .wInitErrorFlags        resb    2   ; Errors during initialization
 
-%if LARGEST_DPT_SIZE == 28
-                            resb    22  ; padding to make DRVDETECTINFO size an even multiple of DPT size
-%elif LARGEST_DPT_SIZE == 20
-                            resb    6
-%elif LARGEST_DPT_SIZE == 18
-                            resb    2
-%else   ; LARGEST_DPT_SIZE == 10
-                            resb    6
-%endif
+    ; DRVDETECTINFO's size must be an even multiple of DPT's size
+    .EndOfDriveDetectInfo:  resb    LARGEST_DPT_SIZE - (.EndOfDriveDetectInfo % LARGEST_DPT_SIZE)
 endstruc
 

trunk/XTIDE_Universal_BIOS/Inc/CustomDPT.inc

@@ -23 +23 @@
 
 ; Base DPT for all device types
-struc DPT   ; 8 or 18 bytes
+struc DPT   ; 10 or 18 bytes
     ; General Disk Parameter Table related
     .wFlags:
@@ -29 +29 @@
     .bFlagsHigh             resb    1
     .bIdevarsOffset         resb    1   ; Offset to IDEVARS for this drive
+    .bInitError             resb    1   ; Flags for AH=09h initialization errors
 
-    .bPchsHeads             resb    1   ; (1...16)
+    ; CHS variables
     .wLchsCylinders         resb    2   ; (1...1027, yes 1027)
     .wLchsHeadsAndSectors:
     .bLchsHeads             resb    1   ; (1...255)
     .bLchsSectorsPerTrack   resb    1   ; (1...63)
+    .bPchsHeads             resb    1   ; (1...16)
 
+    ; LBA and remaining P-CHS variables
 %ifdef MODULE_EBIOS
+    .bPchsSectorsPerTrack   resb    1
+    .wPchsCylinders         resb    2
     .twLbaSectors           resb    6   ; 48-bit sector count for LBA addressing
-    .wPchsCylinders         resb    2
-    .bPchsSectorsPerTrack   resb    1
-                            resb    1
+%else
+                            resb    1   ; Alignment
 %endif
 endstruc
@@ -46 +50 @@
     ; Bit definitions for DPT.bFlagsLow
     MASKL_DPT_CHS_SHIFT_COUNT           EQU (3<<0)              ; Bits 0...1, P-CHS to L-CHS bit shift count (0...3)
-    MASKL_DPT_ADDRESSING_MODE           EQU (3<<ADDRESSING_MODE_FIELD_POSITION) ; Bits 2...3, NORMAL, LARGE or Assisted LBA addressing mode
-    FLGL_DPT_ASSISTED_LBA               EQU (1<<(ADDRESSING_MODE_FIELD_POSITION+1))
+    MASKL_DPT_TRANSLATEMODE             EQU MASK_DRVPARAMS_TRANSLATEMODE    ; Bits 2...3, NORMAL, LARGE or Assisted LBA addressing mode
+    FLGL_DPT_ASSISTED_LBA               EQU (1<<(TRANSLATEMODE_FIELD_POSITION+1))
     FLGL_DPT_SLAVE                      EQU FLG_DRVNHEAD_DRV    ; Bit 4, Drive is a Slave Drive
 %ifdef MODULE_IRQ
@@ -56 +60 @@
     FLGL_DPT_LBA48                      EQU (1<<7)              ; Bit 7, Drive supports 48-bit LBA (Must be bit 7!)
 %endif
-
-    ; Addressing modes for DPT.bFlagsLow
-    ADDRESSING_MODE_FIELD_POSITION      EQU     2
-    ADDRESSING_MODE_NORMAL              EQU     0
-    ADDRESSING_MODE_LARGE               EQU     1
-    ADDRESSING_MODE_ASSISTED_LBA        EQU     2   ; 28-bit or 48-bit LBA
 
 
@@ -87 +85 @@
 
 
+    ; Flags for DPT_ADVANCED_ATA.bInitError
+    FLG_INITERROR_FAILED_TO_SELECT_DRIVE                EQU (1<<0)
+    FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS   EQU (1<<1)
+    FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE             EQU (1<<2)
+    FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE           EQU (1<<3)
+    FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE              EQU (1<<4)
+    FLG_INITERROR_FAILED_TO_SET_PIO_MODE                EQU (1<<5)
+    FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER    EQU (1<<6)
+
+
 
 ; DPT for ATA devices
-struc DPT_ATA   ; 8/18 bytes + 2 bytes = 10/20 bytes
+struc DPT_ATA   ; 10/18 bytes + 2 bytes = 12/20 bytes
     .dpt                    resb    DPT_size
     .bBlockSize             resb    1   ; Current block size in sectors (do not set to zero!)
@@ -100 +108 @@
 ; EBDA must be reserved for DPTs when using these!
 %ifdef MODULE_ADVANCED_ATA
-struc DPT_ADVANCED_ATA  ; 10/20 bytes + 8 bytes = 18/28 bytes
+struc DPT_ADVANCED_ATA  ; 12/20 bytes + 8 bytes = 20/28 bytes
     .dpt_ata                resb    DPT_ATA_size
     .wControllerID          resb    2   ; Controller specific ID WORD (from Advanced Controller detection)
@@ -106 +114 @@
     .wMinPioCycleTime       resb    2   ; Minimum PIO Cycle Time in ns
     .bPioMode               resb    1   ; Best supported PIO mode
-    .bInitError             resb    1   ; Flags for initialization errors
+                            resb    1
 endstruc
-
-    ; Flags for DPT_ADVANCED_ATA.bInitError
-    FLG_INITERROR_FAILED_TO_SELECT_DRIVE                EQU (1<<0)
-    FLG_INITERROR_FAILED_TO_INITIALIZE_CHS_PARAMETERS   EQU (1<<1)
-    FLG_INITERROR_FAILED_TO_SET_WRITE_CACHE             EQU (1<<2)
-    FLG_INITERROR_FAILED_TO_RECALIBRATE_DRIVE           EQU (1<<3)
-    FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE              EQU (1<<4)
-    FLG_INITERROR_FAILED_TO_SET_PIO_MODE                EQU (1<<5)
-    FLG_INITERROR_FAILED_TO_INITIALIZE_STANDBY_TIMER    EQU (1<<6)
 %endif
 

trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc

@@ -164 +164 @@
 
 ; Bit defines for DRVPARAMS.wFlags
-MASK_DRVPARAMS_WRITECACHE   EQU (3<<0)  ; Drive internal write cache settings (must start at bit 0)
-FLG_DRVPARAMS_BLOCKMODE     EQU (1<<2)  ; Enable Block mode transfers
-FLG_DRVPARAMS_USERCHS       EQU (1<<3)  ; User specified P-CHS values
-FLG_DRVPARAMS_USERLBA       EQU (1<<4)  ; User specified LBA values
+MASK_DRVPARAMS_WRITECACHE       EQU (3<<0)  ; Bits 0...1, Drive internal write cache settings (must start at bit 0)
+    DEFAULT_WRITE_CACHE             EQU 0   ; Must be 0
+    DISABLE_WRITE_CACHE             EQU 1
+    ENABLE_WRITE_CACHE              EQU 2
+MASK_DRVPARAMS_TRANSLATEMODE    EQU (3<<TRANSLATEMODE_FIELD_POSITION)   ; Bits 2...3, Position shared with DPT
+    TRANSLATEMODE_FIELD_POSITION    EQU 2
+    TRANSLATEMODE_NORMAL            EQU 0
+    TRANSLATEMODE_LARGE             EQU 1
+    TRANSLATEMODE_ASSISTED_LBA      EQU 2   ; 28-bit or 48-bit LBA
+    TRANSLATEMODE_AUTO              EQU 3   ; Only available in ROMVARS, not in DPTs
+FLG_DRVPARAMS_BLOCKMODE         EQU (1<<4)  ; Enable Block mode transfers
+FLG_DRVPARAMS_USERCHS           EQU (1<<5)  ; User specified P-CHS values
+    MAX_USER_CYLINDERS              EQU 16383
+    MAX_USER_HEADS                  EQU 16
+    MAX_USER_SECTORS_PER_TRACK      EQU 63
+FLG_DRVPARAMS_USERLBA           EQU (1<<6)  ; User specified LBA value
+    MIN_USER_LBA_COUNT              EQU ((MAX_USER_CYLINDERS*MAX_USER_HEADS*MAX_USER_SECTORS_PER_TRACK)+1)
+    MAX_USER_LBA_COUNT              EQU ((2^28)-1)
 
-; Drive Write Cache values for DRVPARAMS.wFlags.MASK_DRVPARAMS_WRITECACHE
-DEFAULT_WRITE_CACHE         EQU 0       ; Must be 0
-DISABLE_WRITE_CACHE         EQU 1
-ENABLE_WRITE_CACHE          EQU 2
 
 %endif ; ROMVARS_INC