Changeset 361 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS
- Timestamp:
- Mar 20, 2012, 5:52:33 PM (13 years ago)
- google:author:
- aitotat@gmail.com
- Location:
- trunk/XTIDE_Universal_BIOS
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/XTIDE_Universal_BIOS/Inc/RomVars.inc
r322 r361 100 100 ; Device types for IDEVARS.bDevice 101 101 ; 102 DEVICE_ 8BIT_DUAL_PORT_XTIDEEQU (0<<1)103 DEVICE_XTIDE_ WITH_REVERSED_A3_AND_A0 EQU (1<<1)104 DEVICE_ 8BIT_SINGLE_PORT EQU (2<<1)102 DEVICE_XTIDE_REV1 EQU (0<<1) 103 DEVICE_XTIDE_REV2 EQU (1<<1) ; Or rev 1 with swapped A0 and A3 (chuck mod) 104 DEVICE_FAST_XTIDE EQU (2<<1) ; (CPLD v2 project) 105 105 DEVICE_16BIT_ATA EQU (3<<1) 106 106 DEVICE_32BIT_ATA EQU (4<<1) -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeDPT.asm
r276 r361 47 47 ;-------------------------------------------------------------------- 48 48 IdeDPT_StoreReversedAddressLinesFlagIfNecessary: 49 cmp BYTE [cs:bp+IDEVARS.bDevice], DEVICE_XTIDE_WITH_REVERSED_A3_AND_A0 49 cmp BYTE [cs:bp+IDEVARS.bDevice], DEVICE_XTIDE_REV2 50 je SHORT .SetFlagForSwappedA0andA3 51 cmp BYTE [cs:bp+IDEVARS.bDevice], DEVICE_FAST_XTIDE 50 52 jne SHORT .EndDPT 53 .SetFlagForSwappedA0andA3: 51 54 or BYTE [di+DPT.bFlagsHigh], FLGH_DPT_REVERSED_A0_AND_A3 52 55 -
trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeTransfer.asm
r294 r361 203 203 204 204 ;-------------------------------------------------------------------- 205 ; DualByteReadForXtide Dual port 8-bit XTIDE PIO read transfer 206 ; SingleByteRead Single port 8-bit PIO read transfer 207 ; WordReadForXTIDEmod 8088/8086 compatible 16-bit IDE PIO read transfer 208 ; WordReadForXTplusAndAT Normal 16-bit IDE PIO read transfer 209 ; DWordRead VLB/PCI 32-bit IDE PIO read transfer 205 ; ReadBlockFromXtideRev1 XTIDE rev 1 206 ; ReadBlockFromXtideRev2 XTIDE rev 2 or rev 1 with swapped A0 and A3 (chuck-mod) 207 ; ReadBlockFrom16bitDataPort Normal 16-bit IDE 208 ; ReadBlockFrom32bitDataPort VLB/PCI 32-bit IDE 210 209 ; Parameters: 211 210 ; CX: Block size in WORDs … … 218 217 ;-------------------------------------------------------------------- 219 218 ALIGN JUMP_ALIGN 220 DualByteReadForXtide:219 ReadBlockFromXtideRev1: 221 220 eSHR_IM cx, 2 ; Loop unrolling 222 221 mov bx, 8 ; Bit mask for toggling data low/high reg … … 230 229 ret 231 230 232 ;---- 233 ALIGN JUMP_ALIGN 234 SingleByteRead: 235 %ifdef USE_186 ; INS instruction available 236 shl cx, 1 ; WORD count to BYTE count 237 dec cx ; Fix for CX overflowing on a 128 sector transfer 238 insb 239 rep insb 240 %else ; If 8088/8086 241 shr cx, 1 ; WORD count to DWORD count 242 ALIGN JUMP_ALIGN 243 .InsdLoop: 244 in al, dx 245 stosb ; Store to [ES:DI] 246 in al, dx 247 stosb 248 in al, dx 249 stosb 250 in al, dx 251 stosb 252 loop .InsdLoop 253 %endif 254 ret 255 256 ;---- 257 %ifndef USE_186 258 ALIGN JUMP_ALIGN 259 WordReadForXTIDEmod: 231 ;-------------------------------------------------------------------- 232 %ifndef USE_186 ; 8086/8088 compatible WORD read 233 ALIGN JUMP_ALIGN 234 ReadBlockFromXtideRev2: 260 235 times 2 shr cx, 1 ; WORD count to QWORD count 261 236 ALIGN JUMP_ALIGN … … 273 248 %endif 274 249 275 ;---- 276 ALIGN JUMP_ALIGN 277 WordReadForXTplusAndAT:250 ;-------------------------------------------------------------------- 251 ALIGN JUMP_ALIGN 252 ReadBlockFrom16bitDataPort: 278 253 rep 279 254 db 6Dh ; INSW (we want this in XT build) 280 255 ret 281 256 282 ;---- 283 ALIGN JUMP_ALIGN 284 DWordRead:257 ;-------------------------------------------------------------------- 258 ALIGN JUMP_ALIGN 259 ReadBlockFrom32bitDataPort: 285 260 shr cx, 1 ; WORD count to DWORD count 286 261 rep … … 291 266 292 267 ;-------------------------------------------------------------------- 293 ; DualByteWriteForXtide Dual port 8-bit XTIDE PIO write transfer294 ; SingleByteWrite Single port 8-bit PIO write transfer295 ; W ordWriteForXTIDEmod 8088/8086 compatible 16-bit IDE PIO read transfer296 ; W ordWrite Normal 16-bit IDE PIO write transfer297 ; DWordWrite VLB/PCI 32-bit IDE PIO write transfer268 ; WriteBlockToXtideRev1 XTIDE rev 1 269 ; WriteBlockToXtideRev2 XTIDE rev 2 or rev 1 with swapped A0 and A3 (chuck-mod) 270 ; WriteBlockToFastXtide Fast XTIDE (CPLD v2 project) 271 ; WriteBlockTo16bitDataPort Normal 16-bit IDE 272 ; WriteBlockTo32bitDataPort VLB/PCI 32-bit IDE 298 273 ; Parameters: 299 274 ; CX: Block size in WORDs … … 306 281 ;-------------------------------------------------------------------- 307 282 ALIGN JUMP_ALIGN 308 DualByteWriteForXtide:283 WriteBlockToXtideRev1: 309 284 push ds 310 285 push bx … … 324 299 ret 325 300 326 ;---- 327 ALIGN JUMP_ALIGN 328 SingleByteWrite: 329 %ifdef USE_186 ; OUTS instruction available 330 shl cx, 1 ; WORD count to BYTE count 331 dec cx ; Fix for CX overflowing on a 128 sector transfer 332 es outsb ; Source is ES segment 333 rep es outsb 334 %else ; If 8088/8086 335 shr cx, 1 ; WORD count to DWORD count 336 push ds ; Store DS 337 push es ; Copy ES... 338 pop ds ; ...to DS 339 ALIGN JUMP_ALIGN 340 .OutsdLoop: 341 lodsb ; Load from [DS:SI] to AL 342 out dx, al 343 lodsb 344 out dx, al 345 lodsb 346 out dx, al 347 lodsb 348 out dx, al 349 loop .OutsdLoop 350 pop ds ; Restore DS 351 %endif 352 ret 353 354 ;--- 355 ALIGN JUMP_ALIGN 356 WordWriteForXTIDEmod: 301 ;-------------------------------------------------------------------- 302 ALIGN JUMP_ALIGN 303 WriteBlockToXtideRev2: 357 304 push ds 358 305 eSHR_IM cx, 2 ; Loop unrolling … … 369 316 ret 370 317 371 ;---- 372 ALIGN JUMP_ALIGN 373 WordWrite: 318 ;-------------------------------------------------------------------- 319 %ifndef USE_186 ; 8086/8088 compatible WORD write 320 ALIGN JUMP_ALIGN 321 WriteBlockToFastXtide: 322 times 2 shr cx, 1 ; WORD count to QWORD count 323 push ds 324 push es 325 pop ds 326 ALIGN JUMP_ALIGN 327 .ReadNextQword: 328 lodsw ; Load 1st WORD from [DS:SI] 329 out dx, ax ; Write 1st WORD 330 lodsw 331 out dx, ax ; 2nd 332 lodsw 333 out dx, ax ; 3rd 334 lodsw 335 out dx, ax ; 4th 336 loop .ReadNextQword 337 pop ds 338 ret 339 %endif 340 341 ;-------------------------------------------------------------------- 342 ALIGN JUMP_ALIGN 343 WriteBlockTo16bitDataPort: 374 344 es ; Source is ES segment 375 345 rep … … 377 347 ret 378 348 379 ALIGN JUMP_ALIGN 380 DWordWrite: 349 ;-------------------------------------------------------------------- 350 ALIGN JUMP_ALIGN 351 WriteBlockTo32bitDataPort: 381 352 shr cx, 1 ; WORD count to DWORD count 382 353 es ; Source is ES segment … … 387 358 388 359 360 389 361 ; Lookup tables to get transfer function based on bus type 390 362 ALIGN WORD_ALIGN 391 363 g_rgfnPioRead: 392 dw DualByteReadForXtide ; DEVICE_8BIT_DUAL_PORT_XTIDE364 dw ReadBlockFromXtideRev1 ; DEVICE_XTIDE_REV1 393 365 %ifdef USE_186 394 dw WordReadForXTplusAndAT ; DEVICE_XTIDE_WITH_REVERSED_A3_AND_A0 366 dw ReadBlockFrom16bitDataPort ; DEVICE_XTIDE_REV2 367 dw ReadBlockFrom16bitDataPort ; DEVICE_FAST_XTIDE 395 368 %else 396 dw WordReadForXTIDEmod397 %endif 398 dw SingleByteRead ; DEVICE_8BIT_SINGLE_PORT 399 dw WordReadForXTplusAndAT; DEVICE_16BIT_ATA400 dw DWordRead; DEVICE_32BIT_ATA369 dw ReadBlockFromXtideRev2 ; DEVICE_XTIDE_REV2 370 dw ReadBlockFromXtideRev2 ; DEVICE_FAST_XTIDE 371 %endif 372 dw ReadBlockFrom16bitDataPort ; DEVICE_16BIT_ATA 373 dw ReadBlockFrom32bitDataPort ; DEVICE_32BIT_ATA 401 374 402 375 g_rgfnPioWrite: 403 dw DualByteWriteForXtide ; DEVICE_8BIT_DUAL_PORT_XTIDE 404 dw WordWriteForXTIDEmod ; DEVICE_XTIDE_WITH_REVERSED_A3_AND_A0 405 dw SingleByteWrite ; DEVICE_8BIT_SINGLE_PORT 406 dw WordWrite ; DEVICE_16BIT_ATA 407 dw DWordWrite ; DEVICE_32BIT_ATA 376 dw WriteBlockToXtideRev1 ; DEVICE_XTIDE_REV1 377 dw WriteBlockToXtideRev2 ; DEVICE_XTIDE_REV2 378 %ifdef USE_186 379 dw WriteBlockTo16bitDataPort ; DEVICE_FAST_XTIDE 380 %else 381 dw WriteBlockToFastXtide ; DEVICE_FAST_XTIDE 382 %endif 383 dw WriteBlockTo16bitDataPort ; DEVICE_16BIT_ATA 384 dw WriteBlockTo32bitDataPort ; DEVICE_32BIT_ATA -
trunk/XTIDE_Universal_BIOS/Src/Main.asm
r358 r361 98 98 at ROMVARS.ideVars2+IDEVARS.wPort, dw DEVICE_XTIDE_DEFAULT_PORT ; Controller Command Block base port 99 99 at ROMVARS.ideVars2+IDEVARS.wPortCtrl, dw DEVICE_XTIDE_DEFAULT_PORTCTRL ; Controller Control Block base port 100 at ROMVARS.ideVars2+IDEVARS.bDevice, db DEVICE_ 8BIT_DUAL_PORT_XTIDE100 at ROMVARS.ideVars2+IDEVARS.bDevice, db DEVICE_XTIDE_REV1 101 101 at ROMVARS.ideVars2+IDEVARS.bIRQ, db 0 102 102 at ROMVARS.ideVars2+IDEVARS.drvParamsMaster+DRVPARAMS.wFlags, db DISABLE_WRITE_CACHE | FLG_DRVPARAMS_BLOCKMODE … … 130 130 at ROMVARS.ideVars0+IDEVARS.bDevice, db DEVICE_JRIDE_ISA 131 131 %else 132 at ROMVARS.ideVars0+IDEVARS.bDevice, db DEVICE_ 8BIT_DUAL_PORT_XTIDE132 at ROMVARS.ideVars0+IDEVARS.bDevice, db DEVICE_XTIDE_REV1 133 133 %endif 134 134 at ROMVARS.ideVars0+IDEVARS.bIRQ, db 0 ; IRQ
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