Changeset 181 in xtideuniversalbios for trunk/XTIDE_Universal_BIOS/Src/Device/IDE

Timestamp:

Nov 13, 2011, 3:38:40 PM (13 years ago)

Author:

krille_n_@…

google:author:

krille_n_@hotmail.com

Message:

Changes to all parts of the project:

• Size optimizations.
• Added a define (EXCLUDE_FROM_XTIDECFG) to exclude unused library code from XTIDECFG.
• Tried to minimize time spent with interrupts disabled.
• Some minor attempts to improve speed (reordering instructions etc).
• Tried to improve readability, did some cleanup and fixed some errors in comments.

Location:

trunk/XTIDE_Universal_BIOS/Src/Device/IDE

Files:

• IdeIO.asm (modified) (5 diffs)
• IdeTransfer.asm (modified) (3 diffs)

trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm

@@ -7 +7 @@
 ;--------------------------------------------------------------------
 ; IdeIO_OutputALtoIdeRegisterInDL
+; IdeIO_OutputALtoIdeControlBlockRegisterInDL
 ;   Parameters:
 ;       AL:     Byte to output
-;       DL:     IDE Register
+;       DL:     IDE Register                (IdeIO_OutputALtoIdeRegisterInDL)
+;               IDE Control Block Register  (IdeIO_OutputALtoIdeControlBlockRegisterInDL)
 ;       DS:DI:  Ptr to DPT (in RAMVARS segment)
 ;   Returns:
@@ -18 +20 @@
 ALIGN JUMP_ALIGN
 IdeIO_OutputALtoIdeRegisterInDL:
-    mov     bx, IDEVARS.wPort
-    call    GetPortToDXandTranslateA0andA3ifNecessary
-    out     dx, al
-    ret
+    mov     bl, IDEVARS.wPort
+    SKIP2B  f   ; cmp ax, <next instruction>
+    ; Fall to IdeIO_OutputALtoIdeControlBlockRegisterInDL
 
-
-;--------------------------------------------------------------------
-; IdeIO_OutputALtoIdeControlBlockRegisterInDL
-;   Parameters:
-;       AL:     Byte to output
-;       DL:     IDE Control Block Register
-;       DS:DI:  Ptr to DPT (in RAMVARS segment)
-;   Returns:
-;       Nothing
-;   Corrupts registers:
-;       BX, DX
-;--------------------------------------------------------------------
-ALIGN JUMP_ALIGN
 IdeIO_OutputALtoIdeControlBlockRegisterInDL:
-    mov     bx, IDEVARS.wPortCtrl
+    mov     bl, IDEVARS.wPortCtrl
     call    GetPortToDXandTranslateA0andA3ifNecessary
     out     dx, al
@@ -55 +43 @@
 ALIGN JUMP_ALIGN
 IdeIO_InputToALfromIdeRegisterInDL:
-    mov     bx, IDEVARS.wPort
+    mov     bl, IDEVARS.wPort
     call    GetPortToDXandTranslateA0andA3ifNecessary
     in      al, dx
@@ -64 +52 @@
 ; GetPortToDXandTranslateA0andA3ifNecessary
 ;   Parameters:
-;       BX:     Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl)
+;       BL:     Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl)
 ;       DL:     IDE Register
 ;       DS:DI:  Ptr to DPT (in RAMVARS segment)
@@ -74 +62 @@
 ALIGN JUMP_ALIGN
 GetPortToDXandTranslateA0andA3ifNecessary:
+    xor     bh, bh
     xor     dh, dh                          ; DX now has IDE register offset
     add     bl, [di+DPT.bIdevarsOffset]     ; CS:BX now points port address

trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeTransfer.asm

@@ -230 +230 @@
 ALIGN JUMP_ALIGN
 DualByteReadForXtide:
-%ifdef USE_186
-    shr     cx, 2       ; Smaller but slower on 186/286
-%else
-    times 2 shr cx, 1   ; Loop unrolling
-%endif
+    eSHR_IM cx, 2       ; Loop unrolling
     mov     bx, 8       ; Bit mask for toggling data low/high reg
 ALIGN JUMP_ALIGN
@@ -322 +318 @@
     push    ds
     push    bx
-%ifdef USE_186
-    shr     cx, 2       ; Smaller but slower on 186/286
-%else
-    times 2 shr cx, 1   ; Loop unrolling
-%endif
+    eSHR_IM cx, 2       ; Loop unrolling
     mov     bx, 8       ; Bit mask for toggling data low/high reg
     push    es          ; Copy ES...
@@ -372 +364 @@
 WordWriteForXTIDEmod:
     push    ds
-%ifdef USE_186
-    shr     cx, 2       ; Smaller but slower on 186/286
-%else
-    times 2 shr cx, 1   ; Loop unrolling
-%endif
+    eSHR_IM cx, 2       ; Loop unrolling
     push    es          ; Copy ES...
     pop     ds          ; ...to DS