source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Initialization/Vision.asm@ 369

Last change on this file since 369 was 364, checked in by aitotat@…, 13 years ago

Changes to XTIDE Universal BIOS:

  • Advanced ATA Module variables are now kept in DPTs.
  • Forced full mode when using Advanced ATA Module.
File size: 7.9 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Functions for initializing QDI Vision
3; QD6500 and QD6580 VLB IDE Controllers.
4
5; Section containing code
6SECTION .text
7
8;--------------------------------------------------------------------
9; Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent
10; Parameters:
11; Nothing
12; Returns:
13; AX: ID WORD specific for QDI Vision Controllers
14; (AL = QD65xx Config Register contents)
15; (AH = QDI Vision Controller ID (bits 4...7))
16; DX: Controller port (not IDE port)
17; ZF: Set if controller found
18; Cleared if supported controller not found (AX,DX = undefined)
19; Corrupts registers:
20; Nothing
21;--------------------------------------------------------------------
22Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent:
23 ; Check QD65xx base port
24 mov dx, QD65XX_BASE_PORT
25 in al, QD65XX_BASE_PORT + QD65XX_CONFIG_REGISTER_in
26 call IsConfigRegisterWithIDinAL
27 je SHORT VisionControllerDetected
28
29 ; Check QD65xx alternative base port
30 or dl, QD65XX_ALTERNATIVE_BASE_PORT
31 in al, QD65XX_ALTERNATIVE_BASE_PORT + QD65XX_CONFIG_REGISTER_in
32 ; Fall to IsConfigRegisterWithIDinAL
33
34;--------------------------------------------------------------------
35; IsConfigRegisterWithIDinAL
36; Parameters:
37; AL: Possible QD65xx Config Register contents
38; Returns:
39; AH QDI Vision Controller ID or undefined
40; ZF: Set if controller found
41; Cleared if supported controller not found (AH = undefined)
42; Corrupts registers:
43; Nothing
44;--------------------------------------------------------------------
45IsConfigRegisterWithIDinAL:
46 mov ah, al
47 and ah, MASK_QDCONFIG_CONTROLLER_ID
48 cmp ah, ID_QD6500 << 4
49 je SHORT VisionControllerDetected
50 cmp ah, ID_QD6580 << 4
51 je SHORT VisionControllerDetected
52 cmp ah, ID_QD6580_ALTERNATE << 4
53VisionControllerDetected:
54 ret
55
56
57;--------------------------------------------------------------------
58; Vision_DoesIdePortInBXbelongToControllerWithIDinAX
59; Parameters:
60; AL: QD65xx Config Register contents
61; AH: QDI Vision Controller ID (bits 4...7)
62; BX: IDE Base port to check
63; DX: Vision Controller port
64; Returns:
65; ZF: Set if port belongs to controller
66; Cleared if port belongs to another controller
67; Corrupts registers:
68; Nothing
69;--------------------------------------------------------------------
70Vision_DoesIdePortInBXbelongToControllerWithIDinAX:
71 cmp ah, ID_QD6500 << 4
72 je SHORT .DoesIdePortInDXbelongToQD6500
73
74 ; QD6580 always have Primary IDE at 1F0h
75 ; Secondary IDE at 170h can be enabled or disabled
76 cmp bx, DEVICE_ATA_DEFAULT_PORT
77 je SHORT .ReturnResultInZF
78
79 ; Check if Secondary IDE channel is enabled
80 push ax
81 add dx, BYTE QD6580_CONTROL_REGISTER
82 in al, dx
83 sub dx, BYTE QD6580_CONTROL_REGISTER
84 test al, FLG_QDCONTROL_SECONDARY_DISABLED_in
85 pop ax
86 jz SHORT .CompareBXtoSecondaryIDE
87 ret
88
89 ; QD6500 has only one IDE channel that can be at 1F0h or 170h
90.DoesIdePortInDXbelongToQD6500:
91 test al, FLG_QDCONFIG_PRIMARY_IDE
92 jz SHORT .CompareBXtoSecondaryIDE
93 cmp bx, DEVICE_ATA_DEFAULT_PORT
94 ret
95
96.CompareBXtoSecondaryIDE:
97 cmp bx, DEVICE_ATA_DEFAULT_SECONDARY_PORT
98.ReturnResultInZF:
99 ret
100
101
102;--------------------------------------------------------------------
103; Vision_GetMaxPioModeToAL
104; Parameters:
105; AL: QD65xx Config Register contents
106; AH: QDI Vision Controller ID (bits 4...7)
107; Returns:
108; AL: Max supported PIO mode
109; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise
110; CF: Set if PIO limit necessary
111; Cleared if no need to limit timings
112; Corrupts registers:
113; (AX if CF cleared)
114; Corrupts registers:
115; Nothing
116;--------------------------------------------------------------------
117Vision_GetMaxPioModeToAL:
118 cmp ah, ID_QD6500 << 4
119 clc
120 jne SHORT .NoNeedToLimitForQD6580
121
122 mov ax, 2 ; Limit to PIO 2 because QD6500 does not support IORDY
123 stc
124.NoNeedToLimitForQD6580:
125 ret
126
127
128;--------------------------------------------------------------------
129; Vision_InitializeWithIDinAHandConfigInAL
130; Parameters:
131; AL: QD65xx Config Register contents
132; AH: QDI Vision Controller ID (bits 4...7)
133; DS:DI: Ptr to DPT for Single or Slave Drive
134; SI: Offset to Master DPT if Slave Drive present
135; Zero if Slave Drive not present
136; Returns:
137; CF: Cleared if success
138; Set if error
139; Corrupts registers:
140; AX, BX, CX, DX, BP
141;--------------------------------------------------------------------
142Vision_InitializeWithIDinAHandConfigInAL:
143 ; QD6580 has a Control Register that needs to be programmed
144 mov dx, [di+DPT_ADVANCED_ATA.wControllerBasePort]
145 cmp ah, ID_QD6500 << 4
146 je SHORT .CalculateTimingForQD6500
147
148 ; Program QD6580 Control Register (not available on QD6500) to
149 ; Enable or Disable Read-Ahead and Post-Write Buffer to match
150 ; jumper setting on the multi I/O card.
151 xor ax, ax
152 add dx, BYTE QD6580_CONTROL_REGISTER
153 in al, dx ; Read to get ATAPI jumper status
154 test al, FLG_QDCONTROL_HDONLY_in
155 eCMOVNZ ah, FLG_QDCONTROL_NONATAPI ; Enable Read-Ahead and Post-Write Buffers
156 or ah, MASK_QDCONTROL_FLAGS_TO_SET
157 mov al, ah
158 out dx, al
159 sub dx, BYTE QD6580_CONTROL_REGISTER
160
161 ; Now we need to determine is the drive connected to the Primary or Secondary channel.
162 ; QD6500 has only one channel that can be Primary at 1F0h or Secondary at 170h.
163 ; QD6580 always has Primary channel at 1F0h. Secondary channel at 170h can be Enabled or Disabled.
164 call AccessDPT_GetIdeBasePortToBX
165 cmp bx, DEVICE_ATA_DEFAULT_PORT
166 je SHORT .CalculateTimingTicksForQD6580 ; Primary Channel so no need to modify DX
167 times 2 inc dx ; Secondary Channel IDE Timing Register
168
169 ; QD6500 and QD6580 require slightly different calculations.
170.CalculateTimingTicksForQD6580:
171 mov bp, QD6580_MAX_ACTIVE_TIME_CLOCKS | (QD6580_MIN_ACTIVE_TIME_CLOCKS << 8)
172 jmp SHORT .CalculateTimingsForQD65xx
173
174.CalculateTimingForQD6500:
175 mov bp, QD6500_MAX_ACTIVE_TIME_CLOCKS | (QD6500_MIN_ACTIVE_TIME_CLOCKS << 8)
176
177 ; We need the PIO Cycle Time in CX to calculate Active and Recovery Times.
178.CalculateTimingsForQD65xx:
179 call AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI
180
181 ; Calculate Active Time value for QD65xx IDE Timing Register
182 call AtaID_GetActiveTimeToAXfromPioModeInBX
183 call ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue
184 xchg bp, ax
185
186 ; Calculate Recovery Time value for QD65xx IDE Timing Register
187 call AtaID_GetRecoveryTimeToAXfromPioModeInBXandCycleTimeInCX
188 mov bx, bp ; Active Time value now in BL
189 mov bp, QD65xx_MAX_RECOVERY_TIME_CLOCKS | (QD65xx_MIN_RECOVERY_TIME_CLOCKS << 8)
190 call ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue
191
192 ; Merge the values to a single byte to output
193 eSHIFT_IM al, POSITON_QD65XXIDE_RECOVERY_TIME, shl
194 or al, bl
195 out dx, al
196 ret ; Return with CF cleared
197
198
199;--------------------------------------------------------------------
200; ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue
201; Parameters:
202; AX: Nanosecs to convert
203; BP: Low Byte: Maximum allowed ticks
204; High Byte: Minimum allowed ticks
205; DS:DI: Ptr to DPT for Single or Slave Drive
206; Returns:
207; AL: Timing value for QD65xx register
208; Corrupts registers:
209; Nothing
210;--------------------------------------------------------------------
211ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue:
212 push cx
213
214 ; Get VLB Cycle Time in nanosecs
215 mov cl, VLB_33MHZ_CYCLE_TIME ; Assume 33 MHz or slower VLB bus
216 test BYTE [di+DPT_ADVANCED_ATA.wControllerID], FLG_QDCONFIG_ID3
217 eCMOVZ cl, VLB_40MHZ_CYCLE_TIME
218
219 ; Convert value in AX to VLB ticks
220 div cl ; AL = VLB ticks
221 inc ax ; Round up
222
223 ; Limit value to QD65xx limits
224 mov cx, bp
225 MAX_U al, ch ; Make sure not below minimum
226 MIN_U al, cl ; Make sure not above maximum
227
228 ; Not done yet, we need to invert the ticks since 0 is the slowest
229 ; value on the timing register
230 sub cl, al
231 xchg ax, cx ; Return in AL
232
233 pop cx
234 ret
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