[363] | 1 | ; Project name : XTIDE Universal BIOS
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| 2 | ; Description : Functions for initializing QDI Vision
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| 3 | ; QD6500 and QD6580 VLB IDE Controllers.
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| 4 |
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| 5 | ; Section containing code
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| 6 | SECTION .text
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| 7 |
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| 8 | ;--------------------------------------------------------------------
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[364] | 9 | ; Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent
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[363] | 10 | ; Parameters:
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| 11 | ; Nothing
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| 12 | ; Returns:
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| 13 | ; AX: ID WORD specific for QDI Vision Controllers
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| 14 | ; (AL = QD65xx Config Register contents)
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| 15 | ; (AH = QDI Vision Controller ID (bits 4...7))
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[364] | 16 | ; DX: Controller port (not IDE port)
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[363] | 17 | ; ZF: Set if controller found
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| 18 | ; Cleared if supported controller not found (AX,DX = undefined)
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| 19 | ; Corrupts registers:
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| 20 | ; Nothing
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| 21 | ;--------------------------------------------------------------------
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[364] | 22 | Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent:
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[363] | 23 | ; Check QD65xx base port
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[364] | 24 | mov dx, QD65XX_BASE_PORT
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[363] | 25 | in al, QD65XX_BASE_PORT + QD65XX_CONFIG_REGISTER_in
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| 26 | call IsConfigRegisterWithIDinAL
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| 27 | je SHORT VisionControllerDetected
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| 28 |
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| 29 | ; Check QD65xx alternative base port
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[364] | 30 | or dl, QD65XX_ALTERNATIVE_BASE_PORT
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[363] | 31 | in al, QD65XX_ALTERNATIVE_BASE_PORT + QD65XX_CONFIG_REGISTER_in
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| 32 | ; Fall to IsConfigRegisterWithIDinAL
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| 33 |
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| 34 | ;--------------------------------------------------------------------
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| 35 | ; IsConfigRegisterWithIDinAL
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| 36 | ; Parameters:
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| 37 | ; AL: Possible QD65xx Config Register contents
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| 38 | ; Returns:
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| 39 | ; AH QDI Vision Controller ID or undefined
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| 40 | ; ZF: Set if controller found
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| 41 | ; Cleared if supported controller not found (AH = undefined)
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| 42 | ; Corrupts registers:
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| 43 | ; Nothing
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| 44 | ;--------------------------------------------------------------------
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| 45 | IsConfigRegisterWithIDinAL:
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| 46 | mov ah, al
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| 47 | and ah, MASK_QDCONFIG_CONTROLLER_ID
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| 48 | cmp ah, ID_QD6500 << 4
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| 49 | je SHORT VisionControllerDetected
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| 50 | cmp ah, ID_QD6580 << 4
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| 51 | je SHORT VisionControllerDetected
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| 52 | cmp ah, ID_QD6580_ALTERNATE << 4
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| 53 | VisionControllerDetected:
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| 54 | ret
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| 55 |
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| 56 |
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| 57 | ;--------------------------------------------------------------------
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[364] | 58 | ; Vision_DoesIdePortInBXbelongToControllerWithIDinAX
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[363] | 59 | ; Parameters:
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[364] | 60 | ; AL: QD65xx Config Register contents
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| 61 | ; AH: QDI Vision Controller ID (bits 4...7)
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| 62 | ; BX: IDE Base port to check
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| 63 | ; DX: Vision Controller port
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[363] | 64 | ; Returns:
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| 65 | ; ZF: Set if port belongs to controller
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| 66 | ; Cleared if port belongs to another controller
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| 67 | ; Corrupts registers:
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[364] | 68 | ; Nothing
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[363] | 69 | ;--------------------------------------------------------------------
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[364] | 70 | Vision_DoesIdePortInBXbelongToControllerWithIDinAX:
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[363] | 71 | cmp ah, ID_QD6500 << 4
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| 72 | je SHORT .DoesIdePortInDXbelongToQD6500
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| 73 |
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| 74 | ; QD6580 always have Primary IDE at 1F0h
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| 75 | ; Secondary IDE at 170h can be enabled or disabled
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[364] | 76 | cmp bx, DEVICE_ATA_DEFAULT_PORT
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[363] | 77 | je SHORT .ReturnResultInZF
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| 78 |
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| 79 | ; Check if Secondary IDE channel is enabled
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[364] | 80 | push ax
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[363] | 81 | add dx, BYTE QD6580_CONTROL_REGISTER
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| 82 | in al, dx
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| 83 | sub dx, BYTE QD6580_CONTROL_REGISTER
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[364] | 84 | test al, FLG_QDCONTROL_SECONDARY_DISABLED_in
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| 85 | pop ax
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| 86 | jz SHORT .CompareBXtoSecondaryIDE
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[363] | 87 | ret
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| 88 |
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| 89 | ; QD6500 has only one IDE channel that can be at 1F0h or 170h
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| 90 | .DoesIdePortInDXbelongToQD6500:
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| 91 | test al, FLG_QDCONFIG_PRIMARY_IDE
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[364] | 92 | jz SHORT .CompareBXtoSecondaryIDE
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| 93 | cmp bx, DEVICE_ATA_DEFAULT_PORT
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[363] | 94 | ret
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| 95 |
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[364] | 96 | .CompareBXtoSecondaryIDE:
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| 97 | cmp bx, DEVICE_ATA_DEFAULT_SECONDARY_PORT
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[363] | 98 | .ReturnResultInZF:
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| 99 | ret
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| 100 |
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| 101 |
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| 102 | ;--------------------------------------------------------------------
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| 103 | ; Vision_GetMaxPioModeToAL
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| 104 | ; Parameters:
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[364] | 105 | ; AL: QD65xx Config Register contents
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| 106 | ; AH: QDI Vision Controller ID (bits 4...7)
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[363] | 107 | ; Returns:
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[364] | 108 | ; AL: Max supported PIO mode
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| 109 | ; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise
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[363] | 110 | ; CF: Set if PIO limit necessary
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| 111 | ; Cleared if no need to limit timings
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| 112 | ; Corrupts registers:
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[364] | 113 | ; (AX if CF cleared)
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| 114 | ; Corrupts registers:
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[363] | 115 | ; Nothing
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| 116 | ;--------------------------------------------------------------------
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| 117 | Vision_GetMaxPioModeToAL:
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| 118 | cmp ah, ID_QD6500 << 4
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| 119 | clc
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| 120 | jne SHORT .NoNeedToLimitForQD6580
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| 121 |
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[364] | 122 | mov ax, 2 ; Limit to PIO 2 because QD6500 does not support IORDY
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[363] | 123 | stc
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| 124 | .NoNeedToLimitForQD6580:
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| 125 | ret
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| 126 |
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| 127 |
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| 128 | ;--------------------------------------------------------------------
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| 129 | ; Vision_InitializeWithIDinAHandConfigInAL
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| 130 | ; Parameters:
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[364] | 131 | ; AL: QD65xx Config Register contents
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| 132 | ; AH: QDI Vision Controller ID (bits 4...7)
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| 133 | ; DS:DI: Ptr to DPT for Single or Slave Drive
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| 134 | ; SI: Offset to Master DPT if Slave Drive present
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| 135 | ; Zero if Slave Drive not present
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[363] | 136 | ; Returns:
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| 137 | ; CF: Cleared if success
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| 138 | ; Set if error
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| 139 | ; Corrupts registers:
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[364] | 140 | ; AX, BX, CX, DX, BP
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[363] | 141 | ;--------------------------------------------------------------------
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| 142 | Vision_InitializeWithIDinAHandConfigInAL:
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| 143 | ; QD6580 has a Control Register that needs to be programmed
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[364] | 144 | mov dx, [di+DPT_ADVANCED_ATA.wControllerBasePort]
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[363] | 145 | cmp ah, ID_QD6500 << 4
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[364] | 146 | je SHORT .CalculateTimingForQD6500
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[363] | 147 |
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| 148 | ; Program QD6580 Control Register (not available on QD6500) to
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| 149 | ; Enable or Disable Read-Ahead and Post-Write Buffer to match
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| 150 | ; jumper setting on the multi I/O card.
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[364] | 151 | xor ax, ax
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[363] | 152 | add dx, BYTE QD6580_CONTROL_REGISTER
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| 153 | in al, dx ; Read to get ATAPI jumper status
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| 154 | test al, FLG_QDCONTROL_HDONLY_in
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[364] | 155 | eCMOVNZ ah, FLG_QDCONTROL_NONATAPI ; Enable Read-Ahead and Post-Write Buffers
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| 156 | or ah, MASK_QDCONTROL_FLAGS_TO_SET
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| 157 | mov al, ah
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[363] | 158 | out dx, al
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[364] | 159 | sub dx, BYTE QD6580_CONTROL_REGISTER
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[363] | 160 |
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| 161 | ; Now we need to determine is the drive connected to the Primary or Secondary channel.
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| 162 | ; QD6500 has only one channel that can be Primary at 1F0h or Secondary at 170h.
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| 163 | ; QD6580 always has Primary channel at 1F0h. Secondary channel at 170h can be Enabled or Disabled.
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[364] | 164 | call AccessDPT_GetIdeBasePortToBX
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| 165 | cmp bx, DEVICE_ATA_DEFAULT_PORT
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| 166 | je SHORT .CalculateTimingTicksForQD6580 ; Primary Channel so no need to modify DX
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[363] | 167 | times 2 inc dx ; Secondary Channel IDE Timing Register
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| 168 |
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[364] | 169 | ; QD6500 and QD6580 require slightly different calculations.
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[363] | 170 | .CalculateTimingTicksForQD6580:
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[364] | 171 | mov bp, QD6580_MAX_ACTIVE_TIME_CLOCKS | (QD6580_MIN_ACTIVE_TIME_CLOCKS << 8)
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| 172 | jmp SHORT .CalculateTimingsForQD65xx
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[363] | 173 |
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[364] | 174 | .CalculateTimingForQD6500:
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| 175 | mov bp, QD6500_MAX_ACTIVE_TIME_CLOCKS | (QD6500_MIN_ACTIVE_TIME_CLOCKS << 8)
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[363] | 176 |
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[364] | 177 | ; We need the PIO Cycle Time in CX to calculate Active and Recovery Times.
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| 178 | .CalculateTimingsForQD65xx:
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| 179 | call AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI
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[363] | 180 |
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[364] | 181 | ; Calculate Active Time value for QD65xx IDE Timing Register
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| 182 | call AtaID_GetActiveTimeToAXfromPioModeInBX
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| 183 | call ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue
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| 184 | xchg bp, ax
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[363] | 185 |
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[364] | 186 | ; Calculate Recovery Time value for QD65xx IDE Timing Register
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| 187 | call AtaID_GetRecoveryTimeToAXfromPioModeInBXandCycleTimeInCX
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| 188 | mov bx, bp ; Active Time value now in BL
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| 189 | mov bp, QD65xx_MAX_RECOVERY_TIME_CLOCKS | (QD65xx_MIN_RECOVERY_TIME_CLOCKS << 8)
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| 190 | call ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue
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| 191 |
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| 192 | ; Merge the values to a single byte to output
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| 193 | eSHIFT_IM al, POSITON_QD65XXIDE_RECOVERY_TIME, shl
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| 194 | or al, bl
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| 195 | out dx, al
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| 196 | ret ; Return with CF cleared
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| 197 |
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| 198 |
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| 199 | ;--------------------------------------------------------------------
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| 200 | ; ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue
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| 201 | ; Parameters:
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| 202 | ; AX: Nanosecs to convert
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| 203 | ; BP: Low Byte: Maximum allowed ticks
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| 204 | ; High Byte: Minimum allowed ticks
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| 205 | ; DS:DI: Ptr to DPT for Single or Slave Drive
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| 206 | ; Returns:
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| 207 | ; AL: Timing value for QD65xx register
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| 208 | ; Corrupts registers:
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| 209 | ; Nothing
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| 210 | ;--------------------------------------------------------------------
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| 211 | ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue:
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| 212 | push cx
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| 213 |
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| 214 | ; Get VLB Cycle Time in nanosecs
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| 215 | mov cl, VLB_33MHZ_CYCLE_TIME ; Assume 33 MHz or slower VLB bus
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| 216 | test BYTE [di+DPT_ADVANCED_ATA.wControllerID], FLG_QDCONFIG_ID3
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| 217 | eCMOVZ cl, VLB_40MHZ_CYCLE_TIME
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| 218 |
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| 219 | ; Convert value in AX to VLB ticks
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| 220 | div cl ; AL = VLB ticks
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[363] | 221 | inc ax ; Round up
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| 222 |
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[364] | 223 | ; Limit value to QD65xx limits
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| 224 | mov cx, bp
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| 225 | MAX_U al, ch ; Make sure not below minimum
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| 226 | MIN_U al, cl ; Make sure not above maximum
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| 227 |
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[363] | 228 | ; Not done yet, we need to invert the ticks since 0 is the slowest
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| 229 | ; value on the timing register
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[364] | 230 | sub cl, al
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| 231 | xchg ax, cx ; Return in AL
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[363] | 232 |
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[364] | 233 | pop cx
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| 234 | ret
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