1 | ; Project name : XTIDE Universal BIOS |
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2 | ; Description : Functions for initializing QDI Vision |
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3 | ; QD6500 and QD6580 VLB IDE Controllers. |
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4 | |
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5 | ; |
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6 | ; XTIDE Universal BIOS and Associated Tools |
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7 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. |
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8 | ; |
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9 | ; This program is free software; you can redistribute it and/or modify |
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10 | ; it under the terms of the GNU General Public License as published by |
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11 | ; the Free Software Foundation; either version 2 of the License, or |
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12 | ; (at your option) any later version. |
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13 | ; |
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14 | ; This program is distributed in the hope that it will be useful, |
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15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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17 | ; GNU General Public License for more details. |
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18 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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19 | ; |
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20 | |
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21 | ; Section containing code |
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22 | SECTION .text |
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23 | |
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24 | ;-------------------------------------------------------------------- |
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25 | ; Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent |
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26 | ; Parameters: |
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27 | ; Nothing |
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28 | ; Returns: |
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29 | ; AX: ID WORD specific for QDI Vision Controllers |
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30 | ; (AL = QD65xx Config Register contents) |
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31 | ; (AH = QDI Vision Controller ID (bits 4...7)) |
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32 | ; DX: Controller port (not IDE port) |
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33 | ; ZF: Set if controller found |
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34 | ; Cleared if supported controller not found (AX,DX = undefined) |
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35 | ; Corrupts registers: |
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36 | ; Nothing |
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37 | ;-------------------------------------------------------------------- |
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38 | Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent: |
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39 | ; Check QD65xx base port |
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40 | mov dx, QD65XX_BASE_PORT |
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41 | in al, QD65XX_BASE_PORT + QD65XX_CONFIG_REGISTER_in |
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42 | call IsConfigRegisterWithIDinAL |
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43 | je SHORT VisionControllerDetected |
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44 | |
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45 | ; Check QD65xx alternative base port |
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46 | or dl, QD65XX_ALTERNATIVE_BASE_PORT |
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47 | in al, QD65XX_ALTERNATIVE_BASE_PORT + QD65XX_CONFIG_REGISTER_in |
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48 | ; Fall to IsConfigRegisterWithIDinAL |
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49 | |
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50 | ;-------------------------------------------------------------------- |
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51 | ; IsConfigRegisterWithIDinAL |
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52 | ; Parameters: |
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53 | ; AL: Possible QD65xx Config Register contents |
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54 | ; Returns: |
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55 | ; AH QDI Vision Controller ID or undefined |
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56 | ; ZF: Set if controller found |
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57 | ; Cleared if supported controller not found (AH = undefined) |
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58 | ; Corrupts registers: |
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59 | ; Nothing |
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60 | ;-------------------------------------------------------------------- |
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61 | IsConfigRegisterWithIDinAL: |
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62 | mov ah, al |
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63 | and al, MASK_QDCONFIG_CONTROLLER_ID |
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64 | cmp al, ID_QD6500 << 4 |
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65 | je SHORT VisionControllerDetected |
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66 | cmp al, ID_QD6580 << 4 |
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67 | je SHORT VisionControllerDetected |
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68 | cmp al, ID_QD6580_ALTERNATE << 4 |
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69 | VisionControllerDetected: |
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70 | xchg ah, al |
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71 | ret |
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72 | |
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73 | |
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74 | ;-------------------------------------------------------------------- |
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75 | ; Vision_DoesIdePortInBXbelongToControllerWithIDinAX |
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76 | ; Parameters: |
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77 | ; AL: QD65xx Config Register contents |
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78 | ; AH: QDI Vision Controller ID (bits 4...7) |
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79 | ; BX: IDE Base port to check |
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80 | ; DX: Vision Controller port |
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81 | ; Returns: |
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82 | ; ZF: Set if port belongs to controller |
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83 | ; Cleared if port belongs to another controller |
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84 | ; Corrupts registers: |
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85 | ; Nothing |
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86 | ;-------------------------------------------------------------------- |
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87 | Vision_DoesIdePortInBXbelongToControllerWithIDinAX: |
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88 | cmp ah, ID_QD6500 << 4 |
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89 | je SHORT .DoesIdePortInDXbelongToQD6500 |
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90 | |
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91 | ; QD6580 always have Primary IDE at 1F0h |
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92 | ; Secondary IDE at 170h can be enabled or disabled |
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93 | cmp bx, DEVICE_ATA_PRIMARY_PORT |
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94 | je SHORT .ReturnResultInZF |
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95 | |
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96 | ; Check if Secondary IDE channel is enabled |
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97 | push ax |
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98 | add dx, BYTE QD6580_CONTROL_REGISTER |
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99 | in al, dx |
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100 | sub dx, BYTE QD6580_CONTROL_REGISTER |
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101 | test al, FLG_QDCONTROL_SECONDARY_DISABLED_in |
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102 | pop ax |
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103 | jz SHORT .CompareBXtoSecondaryIDE |
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104 | ret |
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105 | |
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106 | ; QD6500 has only one IDE channel that can be at 1F0h or 170h |
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107 | .DoesIdePortInDXbelongToQD6500: |
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108 | test al, FLG_QDCONFIG_PRIMARY_IDE |
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109 | jz SHORT .CompareBXtoSecondaryIDE |
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110 | cmp bx, DEVICE_ATA_PRIMARY_PORT |
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111 | ret |
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112 | |
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113 | .CompareBXtoSecondaryIDE: |
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114 | cmp bx, DEVICE_ATA_SECONDARY_PORT |
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115 | .ReturnResultInZF: |
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116 | ret |
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117 | |
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118 | |
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119 | ;-------------------------------------------------------------------- |
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120 | ; Vision_GetMaxPioModeToAL |
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121 | ; Parameters: |
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122 | ; AL: QD65xx Config Register contents |
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123 | ; AH: QDI Vision Controller ID (bits 4...7) |
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124 | ; Returns: |
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125 | ; AL: Max supported PIO mode |
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126 | ; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise |
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127 | ; CF: Set if PIO limit necessary |
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128 | ; Cleared if no need to limit timings |
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129 | ; Corrupts registers: |
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130 | ; (AX if CF cleared) |
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131 | ; Corrupts registers: |
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132 | ; Nothing |
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133 | ;-------------------------------------------------------------------- |
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134 | Vision_GetMaxPioModeToAL: |
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135 | cmp ah, ID_QD6500 << 4 |
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136 | clc |
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137 | jne SHORT .NoNeedToLimitForQD6580 |
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138 | |
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139 | mov ax, 2 ; Limit to PIO 2 because QD6500 does not support IORDY |
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140 | stc |
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141 | .NoNeedToLimitForQD6580: |
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142 | ret |
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143 | |
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144 | |
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145 | ;-------------------------------------------------------------------- |
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146 | ; Vision_InitializeWithIDinAHandConfigInAL |
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147 | ; Parameters: |
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148 | ; AL: QD65xx Config Register contents |
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149 | ; AH: QDI Vision Controller ID (bits 4...7) |
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150 | ; DS:DI: Ptr to DPT for Single or Slave Drive |
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151 | ; SI: Offset to Master DPT if Slave Drive present |
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152 | ; Zero if Slave Drive not present |
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153 | ; Returns: |
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154 | ; CF: Cleared if success |
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155 | ; Set if error |
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156 | ; Corrupts registers: |
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157 | ; AX, BX, CX, DX, BP |
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158 | ;-------------------------------------------------------------------- |
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159 | Vision_InitializeWithIDinAHandConfigInAL: |
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160 | ; QD6580 has a Control Register that needs to be programmed |
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161 | mov dx, [di+DPT_ADVANCED_ATA.wControllerBasePort] |
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162 | cmp ah, ID_QD6500 << 4 |
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163 | je SHORT .CalculateTimingForQD6500 |
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164 | |
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165 | ; Program QD6580 Control Register (not available on QD6500) to |
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166 | ; Enable or Disable Read-Ahead and Post-Write Buffer to match |
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167 | ; jumper setting on the multi I/O card. |
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168 | xor ax, ax |
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169 | add dx, BYTE QD6580_CONTROL_REGISTER |
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170 | in al, dx ; Read to get ATAPI jumper status |
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171 | test al, FLG_QDCONTROL_HDONLY_in |
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172 | eCMOVNZ ah, FLG_QDCONTROL_NONATAPI ; Enable Read-Ahead and Post-Write Buffers |
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173 | or ah, MASK_QDCONTROL_FLAGS_TO_SET |
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174 | mov al, ah |
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175 | out dx, al |
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176 | sub dx, BYTE QD6580_CONTROL_REGISTER |
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177 | |
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178 | ; Now we need to determine is the drive connected to the Primary or Secondary channel. |
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179 | ; QD6500 has only one channel that can be Primary at 1F0h or Secondary at 170h. |
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180 | ; QD6580 always has Primary channel at 1F0h. Secondary channel at 170h can be Enabled or Disabled. |
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181 | call AccessDPT_GetIdeBasePortToBX |
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182 | cmp bx, DEVICE_ATA_PRIMARY_PORT |
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183 | je SHORT .CalculateTimingTicksForQD6580 ; Primary Channel so no need to modify DX |
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184 | times 2 inc dx ; Secondary Channel IDE Timing Register |
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185 | |
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186 | ; QD6500 and QD6580 require slightly different calculations. |
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187 | .CalculateTimingTicksForQD6580: |
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188 | mov bp, QD6580_MAX_ACTIVE_TIME_CLOCKS | (QD6580_MIN_ACTIVE_TIME_CLOCKS << 8) |
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189 | jmp SHORT .CalculateTimingsForQD65xx |
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190 | |
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191 | .CalculateTimingForQD6500: |
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192 | mov bp, QD6500_MAX_ACTIVE_TIME_CLOCKS | (QD6500_MIN_ACTIVE_TIME_CLOCKS << 8) |
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193 | |
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194 | ; We need the PIO Cycle Time in CX to calculate Active and Recovery Times. |
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195 | .CalculateTimingsForQD65xx: |
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196 | call AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI |
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197 | |
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198 | ; Calculate Active Time value for QD65xx IDE Timing Register |
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199 | call AtaID_GetActiveTimeToAXfromPioModeInBX |
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200 | call ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue |
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201 | xchg bp, ax |
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202 | |
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203 | ; Calculate Recovery Time value for QD65xx IDE Timing Register |
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204 | call AtaID_GetRecoveryTimeToAXfromPioModeInBXandCycleTimeInCX |
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205 | mov bx, bp ; Active Time value now in BL |
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206 | mov bp, QD65xx_MAX_RECOVERY_TIME_CLOCKS | (QD65xx_MIN_RECOVERY_TIME_CLOCKS << 8) |
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207 | call ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue |
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208 | |
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209 | ; Merge the values to a single byte to output |
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210 | eSHIFT_IM al, POSITON_QD65XXIDE_RECOVERY_TIME, shl |
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211 | or al, bl |
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212 | out dx, al |
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213 | ret ; Return with CF cleared |
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214 | |
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215 | |
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216 | ;-------------------------------------------------------------------- |
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217 | ; ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue |
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218 | ; Parameters: |
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219 | ; AX: Nanosecs to convert |
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220 | ; BP: Low Byte: Maximum allowed ticks |
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221 | ; High Byte: Minimum allowed ticks |
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222 | ; DS:DI: Ptr to DPT for Single or Slave Drive |
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223 | ; Returns: |
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224 | ; AL: Timing value for QD65xx register |
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225 | ; Corrupts registers: |
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226 | ; Nothing |
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227 | ;-------------------------------------------------------------------- |
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228 | ConvertNanosecsFromAXwithLimitsInBPtoRegisterValue: |
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229 | push cx |
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230 | |
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231 | ; Get VLB Cycle Time in nanosecs |
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232 | mov cl, VLB_33MHZ_CYCLE_TIME ; Assume 33 MHz or slower VLB bus |
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233 | test BYTE [di+DPT_ADVANCED_ATA.wControllerID], FLG_QDCONFIG_ID3 |
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234 | eCMOVZ cl, VLB_40MHZ_CYCLE_TIME |
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235 | |
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236 | ; Convert value in AX to VLB ticks |
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237 | div cl ; AL = VLB ticks |
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238 | inc ax ; Round up |
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239 | |
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240 | ; Limit value to QD65xx limits |
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241 | mov cx, bp |
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242 | MAX_U al, ch ; Make sure not below minimum |
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243 | MIN_U al, cl ; Make sure not above maximum |
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244 | |
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245 | ; Not done yet, we need to invert the ticks since 0 is the slowest |
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246 | ; value on the timing register |
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247 | sub cl, al |
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248 | xchg ax, cx ; Return in AL |
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249 | |
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250 | pop cx |
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251 | ret |
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