source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/PDC20x30.asm@ 607

Last change on this file since 607 was 592, checked in by Krister Nordvall, 6 years ago

Changes:

  • The problem with NASM in the previous revision (r591) has been fixed.
  • The colors used by the boot menu and hotkey bar can now be customized by selecting one of a number of pre-defined color themes. Suggestions for additional themes are more than welcome!
  • Large builds are now 10 KB. Small builds are still 8 KB with the exception of the Tiny build which is now 4 KB. In other words, builds are now as small as possible to make it easier to combine them with other BIOSes.
  • Added code to the library to improve drive error handling. XTIDECFG can now handle "Drive Not Ready" errors.
  • Fixed a couple of potential bugs in AtaID.asm (AtaID_GetMaxPioModeToAXandMinCycleTimeToCX); 1) ATA1.bPioMode was treated as a WORD variable. 2) ATA2.bPIOSupp was assumed to be non-zero which would result in PIO mode 3 being returned if the assumption was wrong.
  • Made the same changes in the equivalent function used by BIOSDRVS (DisplayPioModeInformationUsingAtaInfoFromDSBX in AtaInfo.asm).
  • Fixed a bug from r587 in PDC20x30.asm in PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX.
  • Fixed a bug from r523 in XTIDECFG where Auto Configure would only set the IRQ on one IDE interface on AT-builds.
  • XTIDECFG will now restore the default settings for the "Serial port virtual device" when reselecting it in the list of device types. This makes it behave consistently for all device types.
  • The eAAM macro is now used regardless if USE_UNDOC_INTEL is defined or not because it is apparently supported on all processors including the NEC V20/V30 CPUs.
  • Renamed the EXCLUDE_FROM_XTIDE_UNIVERSAL_BIOS define to EXCLUDE_FROM_XUB.
  • Added a define to exclude unused library code from BIOSDRVS (EXCLUDE_FROM_BIOSDRVS). This makes it a lot smaller than in previous revisions.
  • All unnecessary CLD-instructions are now under a new define 'CLD_NEEDED' which is only enabled for the BIOS. It is disabled for XTIDECFG and BIOSDRVS but can be enabled if needed by adding this define to the respective makefile. This change was made because these unnecessary instructions are wasteful and should never be needed. In fact, they only serve to hide bugs (in other peoples code) which I strongly believe should be avoided. I recommend people making their own BIOSes from source to not use this define as it's extremely unlikely to be needed.
  • Updated the copyright info in SerDrive and changed an URL to point to the new site.
  • Updated the copyright info and version number in BIOSDRVS.
  • Updated the copyright info in XTIDECFG.
  • Optimizations in general.
File size: 7.6 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Functions for initializing Promise
3; PDC 20230 and 20630 VLB IDE Controllers.
4
5;
6; XTIDE Universal BIOS and Associated Tools
7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17; GNU General Public License for more details.
18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
21; Section containing code
22SECTION .text
23
24;--------------------------------------------------------------------
25; PDC20x30_DetectControllerForIdeBaseInBX
26; Parameters:
27; BX: IDE Base Port
28; Returns:
29; AX: ID WORD for detected controller
30; DX: Controller base port
31; CF: Set if PDC detected
32; Corrupts registers:
33; BX (only when PDC detected)
34;--------------------------------------------------------------------
35PDC20x30_DetectControllerForIdeBaseInBX:
36 mov dx, bx
37 call EnablePdcProgrammingMode
38 jnz SHORT DisablePdcProgrammingMode.Return ; PDC controller not detected
39; ePUSH_T ax, DisablePdcProgrammingMode ; Uncomment this if GetPdcIDtoAX needs to be a real function
40 ; Fall to GetPdcIDtoAX
41
42;--------------------------------------------------------------------
43; Programming mode must be enabled for this function.
44; This function also enables PDC 20630 extra registers.
45;
46; GetPdcIDtoAX
47; Parameters:
48; DX: IDE Base port
49; Returns:
50; AH: PDC ID
51; Corrupts registers:
52; AL, BX
53;--------------------------------------------------------------------
54GetPdcIDtoAX:
55 push dx
56
57 ; Try to enable PDC 20630 extra registers
58 add dx, BYTE LOW_CYLINDER_REGISTER
59 in al, dx
60 or al, FLG_PDCLCR_ENABLE_EXTRA_REGISTERS
61 out dx, al
62
63 ; Try to access PDC 20630 registers to see if they are available
64 ; Hopefully this does not cause problems for systems with PDC 20230
65 add dx, BYTE PDC20630_INDEX_REGISTER - LOW_CYLINDER_REGISTER
66 mov al, PDCREG7_STATUS ; Try to access PDC 20630 status register
67 out dx, al
68 xchg bx, ax
69 in al, dx ; Does index register contain status register index?
70 cmp al, bl
71 mov ah, ID_PDC20630
72 eCMOVNE ah, ID_PDC20230
73
74 pop dx
75; ret ; Uncomment this to make GetPdcIDtoAX a real function
76 ; Fall to DisablePdcProgrammingMode
77
78
79;--------------------------------------------------------------------
80; DisablePdcProgrammingMode
81; Parameters:
82; DX: Base port
83; Returns:
84; CF: Set
85; Corrupts registers:
86; AL
87;--------------------------------------------------------------------
88DisablePdcProgrammingMode:
89 add dx, BYTE HIGH_CYLINDER_REGISTER
90 in al, dx
91 add dx, -HIGH_CYLINDER_REGISTER ; Sets CF for PDC20x30_DetectControllerForIdeBaseInBX
92.Return:
93 ret
94
95
96;--------------------------------------------------------------------
97; EnablePdcProgrammingMode
98; Parameters:
99; DX: Base port
100; Returns:
101; CF: Cleared
102; ZF: Set if programming mode enabled
103; Corrupts registers:
104; AL
105;--------------------------------------------------------------------
106EnablePdcProgrammingMode:
107 ; Set bit 7 to sector count register
108 inc dx
109 inc dx
110 in al, dx ; 1F2h (SECTOR_COUNT_REGISTER)
111 or al, 80h
112 out dx, al
113
114 ; PDC detection sequence (should delay be added between register reads?)
115 add dx, BYTE HIGH_CYLINDER_REGISTER - SECTOR_COUNT_REGISTER
116 in al, dx ; 1F5h
117 cli
118 sub dx, BYTE HIGH_CYLINDER_REGISTER - SECTOR_COUNT_REGISTER
119 in al, dx ; 1F2h
120 add dx, STANDARD_CONTROL_BLOCK_OFFSET + (ALTERNATE_STATUS_REGISTER_in - SECTOR_COUNT_REGISTER)
121 in al, dx ; 3F6h
122 in al, dx ; 3F6h
123 sub dx, STANDARD_CONTROL_BLOCK_OFFSET + (ALTERNATE_STATUS_REGISTER_in - SECTOR_COUNT_REGISTER)
124 in al, dx ; 1F2h
125 in al, dx ; 1F2h
126 sti
127
128 ; PDC20230C and PDC20630 clears the bit we set at the beginning
129 in al, dx ; 1F2h
130 dec dx
131 dec dx ; Base port
132 test al, 80h ; Clears CF
133 ret
134
135
136;--------------------------------------------------------------------
137; PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX
138; Parameters:
139; AX: ID WORD specific for detected controller
140; Returns:
141; AL: Max supported PIO mode (only if ZF set)
142; AH: ~FLGH_DPT_IORDY if IORDY not supported, -1 otherwise (only if ZF set)
143; BX: Min PIO cycle time (only if ZF set)
144; ZF: Set if PIO limit necessary
145; Cleared if no need to limit timings
146; Corrupts registers:
147; Nothing
148;--------------------------------------------------------------------
149PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX:
150 cmp ah, ID_PDC20230
151 jne SHORT .Return ; No need to limit anything for ID_PDC20630
152 mov ax, (~FLGH_DPT_IORDY & 0FFh) << 8 | 2 ; Limit PIO to 2 for ID_PDC20230
153 mov bx, PIO_2_MIN_CYCLE_TIME_NS
154.Return:
155 ret
156
157
158;--------------------------------------------------------------------
159; PDC20x30_InitializeForDPTinDSDI
160; Parameters:
161; DS:DI: Ptr to DPT for Single or Slave Drive
162; Returns:
163; AH: Int 13h return status
164; CF: Cleared if success or no controller to initialize
165; Set if error
166; Corrupts registers:
167; AL, BX, CX, DX
168;--------------------------------------------------------------------
169PDC20x30_InitializeForDPTinDSDI:
170%ifdef USE_386
171 xor ch, ch
172 test BYTE [di+DPT.bFlagsLow], FLGL_DPT_SLAVE
173 setnz cl
174%else
175 xor cx, cx
176 test BYTE [di+DPT.bFlagsLow], FLGL_DPT_SLAVE
177 jz SHORT .NotSlave
178 inc cx
179.NotSlave:
180%endif
181
182 mov dx, [di+DPT.wBasePort]
183 call EnablePdcProgrammingMode
184 call SetSpeedForDriveInCX
185 cmp BYTE [di+DPT_ADVANCED_ATA.wControllerID+1], ID_PDC20630
186 jne SHORT .InitializationCompleted
187 call SetPdc20630SpeedForDriveInCX
188.InitializationCompleted:
189 mov dx, [di+DPT.wBasePort]
190 call DisablePdcProgrammingMode
191 xor ah, ah
192 ret
193
194
195;--------------------------------------------------------------------
196; SetSpeedForDriveInCX
197; Parameters:
198; CX: 0 for master, 1 for slave drive
199; DX: IDE Base port
200; DS:DI: Ptr to DPT
201; Returns:
202; DX: Sector Number Register
203; Corrupts registers:
204; AX, BX
205;--------------------------------------------------------------------
206SetSpeedForDriveInCX:
207 mov bx, .rgbPioModeToPDCspeedValue
208 mov al, [di+DPT_ADVANCED_ATA.bPioMode]
209 MIN_U al, 2 ; Limit to PIO2
210 cs xlat
211 xchg bx, ax
212
213 add dx, BYTE SECTOR_NUMBER_REGISTER
214 mov bh, ~MASK_PDCSCR_DEV1SPEED ; Assume slave
215 inc cx
216 loop .SetSpeed
217 eSHL_IM bl, POS_PDCSCR_DEV0SPEED
218 mov bh, ~MASK_PDCSCR_DEV0SPEED
219.SetSpeed:
220 in al, dx
221 and al, bh
222 or al, bl
223 cmp bl, 7
224 jb SHORT .OutputNewValue
225 or al, FLG_PDCSCR_UNKNOWN_BIT7 ; Flag for PIO 2 and above?
226.OutputNewValue:
227 out dx, al
228 ret
229
230.rgbPioModeToPDCspeedValue:
231 db 0 ; PIO 0
232 db 4 ; PIO 1
233 db 7 ; PIO 2
234
235
236;--------------------------------------------------------------------
237; SetPdc20630SpeedForDriveInCX
238; Parameters:
239; CX: 0 for master, 1 for slave drive
240; DS:DI: Ptr to DPT
241; DX: Sector Number Register
242; Returns:
243; DX: Low Cylinder Register
244; Corrupts registers:
245; AX
246;--------------------------------------------------------------------
247SetPdc20630SpeedForDriveInCX:
248 inc dx ; LOW_CYLINDER_REGISTER
249 mov ah, ~(FLG_PDCLCR_DEV0SPEED_BIT4 | FLG_PDCLCR_DEV0IORDY)
250 ror ah, cl
251 in al, dx
252 and al, ah ; Clear drive specific bits
253 cmp BYTE [di+DPT_ADVANCED_ATA.bPioMode], 2
254 jbe .ClearBitsOnly
255 not ah
256 or al, ah
257.ClearBitsOnly:
258 out dx, al
259 ret
260
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