source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/PDC20x30.asm@ 587

Last change on this file since 587 was 587, checked in by Tomi Tilli, 10 years ago

Changes to XTIDE Universal BIOS:

  • Added support for Promise PDC 20230-C and 20630 VLB IDE controllers (untested).
File size: 7.1 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Functions for initializing Promise
3; PDC 20230 and 20630 VLB IDE Controllers.
4
5;
6; XTIDE Universal BIOS and Associated Tools
7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17; GNU General Public License for more details.
18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
21; Section containing code
22SECTION .text
23
24;--------------------------------------------------------------------
25; PDC20x30_DetectControllerForIdeBaseInBX
26; Parameters:
27; BX: IDE Base Port
28; Returns:
29; AX: ID WORD for detected controller
30; DX: Controller base port
31; CF: Set if PDC detected
32; Corrupts registers:
33; BX (only when PDC detected)
34;--------------------------------------------------------------------
35PDC20x30_DetectControllerForIdeBaseInBX:
36 mov dx, bx
37 call EnablePdcProgrammingMode
38 jz .ControllerDetected
39 clc
40 ret
41.ControllerDetected:
42 call GetPdcIDtoAX
43 ; Fall to DisablePdcProgrammingMode
44
45
46;--------------------------------------------------------------------
47; DisablePdcProgrammingMode
48; Parameters:
49; DX: Base port
50; Returns:
51; Nothing
52; Corrupts registers:
53; AL
54;--------------------------------------------------------------------
55DisablePdcProgrammingMode:
56 add dx, BYTE HIGH_CYLINDER_REGISTER
57 in al, dx
58 sub dx, BYTE HIGH_CYLINDER_REGISTER
59 stc ; Set for PDC20x30_DetectControllerForIdeBaseInBX
60 ret
61
62
63;--------------------------------------------------------------------
64; EnablePdcProgrammingMode
65; Parameters:
66; DX: Base port
67; Returns:
68; ZF: Set if programming mode enabled
69; Corrupts registers:
70; AL
71;--------------------------------------------------------------------
72EnablePdcProgrammingMode:
73 ; Set bit 7 to sector count register
74 add dx, BYTE SECTOR_COUNT_REGISTER
75 in al, dx
76 or al, 80h
77 out dx, al
78
79 ; PDC detection sequence (should delay be added between register reads?)
80 add dx, BYTE HIGH_CYLINDER_REGISTER - SECTOR_COUNT_REGISTER
81 in al, dx ; 1F5h
82 cli
83 sub dx, BYTE HIGH_CYLINDER_REGISTER - SECTOR_COUNT_REGISTER
84 in al, dx ; 1F2h
85 add dx, STANDARD_CONTROL_BLOCK_OFFSET + (ALTERNATE_STATUS_REGISTER_in - SECTOR_COUNT_REGISTER)
86 in al, dx ; 3F6h
87 in al, dx ; 3F6h
88 sub dx, STANDARD_CONTROL_BLOCK_OFFSET + (ALTERNATE_STATUS_REGISTER_in - SECTOR_COUNT_REGISTER)
89 in al, dx ; 1F2h
90 in al, dx ; 1F2h
91 sti
92
93 ; PDC20230C and PDC20630 clears the bit we set at the beginning
94 in al, dx
95 sub dx, BYTE SECTOR_COUNT_REGISTER
96 test al, 80h
97 ret
98
99
100;--------------------------------------------------------------------
101; Programming mode must be enabled for this function.
102; This function also enables PDC 20630 extra registers.
103;
104; GetPdcIDtoAX
105; Parameters:
106; DX: IDE Base port
107; Returns:
108; AX: PDC ID word
109; Corrupts registers:
110; BX
111;--------------------------------------------------------------------
112GetPdcIDtoAX:
113 ; Try to enable PDC 20630 extra registers
114 add dx, BYTE LOW_CYLINDER_REGISTER
115 in al, dx
116 or al, FLG_PDCLCR_ENABLE_EXTRA_REGISTERS
117 out dx, al
118
119 ; Try to access PDC 20630 registers to see if they are available
120 ; Hopefully this does not cause problems for systems with PDC 20230
121 add dx, BYTE PDC20630_INDEX_REGISTER - LOW_CYLINDER_REGISTER
122 mov al, PDCREG7_STATUS ; Try to access PDC 20630 status register
123 out dx, al
124 xchg bx, ax
125 in al, dx ; Does index register contain status register index?
126 cmp al, bl
127 mov ah, ID_PDC20630
128 eCMOVNE ah, ID_PDC20230
129 ret
130
131
132;--------------------------------------------------------------------
133; PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX
134; Parameters:
135; AX: ID WORD specific for detected controller
136; Returns:
137; AL: Max supported PIO mode
138; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise
139; BX: Min PIO cycle time (only if ZF set)
140; ZF: Set if PIO limit necessary
141; Cleared if no need to limit timings
142; Corrupts registers:
143; Nothing
144;--------------------------------------------------------------------
145PDC20x30_GetMaxPioModeToALandMinPioCycleTimeToBX:
146 cmp ah, ID_PDC20630
147 je SHORT .return ; No need to limit anything
148 mov ax, 2 ; Limit PIO to 2 for ID_PDC20230
149 mov bx, PIO_2_MIN_CYCLE_TIME_NS
150 stc
151.return:
152 ret
153
154
155;--------------------------------------------------------------------
156; PDC20x30_InitializeForDPTinDSDI
157; Parameters:
158; DS:DI: Ptr to DPT for Single or Slave Drive
159; Returns:
160; AH: Int 13h return status
161; CF: Cleared if success or no controller to initialize
162; Set if error
163; Corrupts registers:
164; AL, BX, CX, DX
165;--------------------------------------------------------------------
166PDC20x30_InitializeForDPTinDSDI:
167 xor cx, cx
168 test BYTE [di+DPT.bFlagsLow], FLGL_DPT_SLAVE
169 eCSETNZ cl
170
171 mov dx, [di+DPT.wBasePort]
172 call EnablePdcProgrammingMode
173 call SetSpeedForDriveInCX
174 cmp BYTE [di+DPT_ADVANCED_ATA.wControllerID+1], ID_PDC20630
175 jne .initializationCompleted
176 call SetPdc20630SpeedForDriveInCX
177.initializationCompleted:
178 mov dx, [di+DPT.wBasePort]
179 call DisablePdcProgrammingMode
180 xor ah, ah
181 ret
182
183
184;--------------------------------------------------------------------
185; SetSpeedForDriveInCX
186; Parameters:
187; CX: 0 for master, 1 for slave drive
188; DX: IDE Base port
189; DS:DI: Ptr to DPT
190; Returns:
191; DX: Sector Number Register
192; Corrupts registers:
193; AX, BX
194;--------------------------------------------------------------------
195SetSpeedForDriveInCX:
196 eMOVZX bx, BYTE [di+DPT_ADVANCED_ATA.bPioMode]
197 MIN_U bl, 2 ; Limit to PIO2
198 mov bl, [cs:bx+.rgbPioModeToPDCspeedValue]
199
200 add dx, BYTE SECTOR_NUMBER_REGISTER
201 mov bh, ~MASK_PDCSCR_DEV1SPEED ; Assume slave
202 test cx, cx
203 jnz .setSpeed
204 eSHL_IM bl, POS_PDCSCR_DEV0SPEED
205 mov bh, ~MASK_PDCSCR_DEV0SPEED
206.setSpeed:
207 in al, dx
208 and al, bh
209 or al, bl
210 cmp bl, 7
211 jb SHORT OutputNewValue
212 or al, FLG_PDCSCR_UNKNOWN_BIT7 ; Flag for PIO 2 and above?
213 jmp SHORT OutputNewValue
214
215.rgbPioModeToPDCspeedValue:
216 db 0 ; PIO 0
217 db 4 ; PIO 1
218 db 7 ; PIO 2
219
220
221;--------------------------------------------------------------------
222; SetPdc20630SpeedForDriveInCX
223; Parameters:
224; CX: 0 for master, 1 for slave drive
225; DS:DI: Ptr to DPT
226; DX: Sector Number Register
227; Returns:
228; DX: Low Cylinder Register
229; Corrupts registers:
230; AX, CX
231;--------------------------------------------------------------------
232SetPdc20630SpeedForDriveInCX:
233 inc dx ; LOW_CYLINDER_REGISTER
234 mov ah, FLG_PDCLCR_DEV0SPEED_BIT4 | FLG_PDCLCR_DEV0IORDY
235 shr ah, cl
236 in al, dx
237 not ah
238 and al, ah ; Clear drive specific bits
239 cmp BYTE [di+DPT_ADVANCED_ATA.bPioMode], 2
240 jbe .clearBitsOnly
241 not ah
242 or al, ah
243.clearBitsOnly:
244OutputNewValue:
245 out dx, al
246 ret
247
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