source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Initialization/AdvancedAta/AdvAtaInit.asm@ 465

Last change on this file since 465 was 399, checked in by krille_n_@…, 13 years ago

Changes:

  • Added Power Management (Standby Timer) support to the BIOS and made it part of an optional module (MODULE_FEATURE_SETS). The total amount of ROM space used by this feature is 37 bytes. UNTESTED
  • Size optimizations (mostly inlining of procedures) and fixed a few bugs in AH9h_HInit.asm:
    1. DPT_ATA.bInitError would be cleared only if MODULE_SERIAL was not defined.
    2. The FLG_INITERROR_FAILED_TO_SET_BLOCK_MODE flag could never be set.
    3. InitializeBlockMode could potentially loop forever if there was an error.
  • Removed some odd looking code in .PushResetStatus in BootMenuPrintCfg.asm
  • Made some changes to XTIDECFG so it can be built.
File size: 4.7 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : Common functions for initializing different
3; VLB and PCI IDE Controllers.
4
5;
6; XTIDE Universal BIOS and Associated Tools
7; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17; GNU General Public License for more details.
18; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
19;
20
21; Section containing code
22SECTION .text
23
24;--------------------------------------------------------------------
25; AdvAtaInit_DetectControllerForIdeBaseInBX
26; Parameters:
27; BX: IDE Controller base port
28; Returns:
29; AX: ID WORD specific for detected controller
30; Zero if no controller detected
31; DX: Controller base port (not IDE)
32; CF: Set if controller detected
33; Cleared if no controller
34; Corrupts registers:
35; BX
36;--------------------------------------------------------------------
37AdvAtaInit_DetectControllerForIdeBaseInBX:
38 call Vision_DetectAndReturnIDinAXandPortInDXifControllerPresent
39 jne SHORT .NoAdvancedControllerForPortBX
40 call Vision_DoesIdePortInBXbelongToControllerWithIDinAX
41 jne SHORT .NoAdvancedControllerForPortBX
42
43 stc ; Advanced Controller found for port BX
44 ret
45
46.NoAdvancedControllerForPortBX:
47 xor ax, ax
48 ret
49
50
51;--------------------------------------------------------------------
52; AdvAtaInit_GetControllerMaxPioModeToAL
53; Parameters:
54; AX: ID WORD specific for detected controller
55; Returns:
56; AL: Max supported PIO mode
57; AH: FLGH_DPT_IORDY if IORDY supported, zero otherwise
58; CF: Set if PIO limit necessary
59; Cleared if no need to limit timings
60; Corrupts registers:
61; (AX if CF cleared)
62;--------------------------------------------------------------------
63AdvAtaInit_GetControllerMaxPioModeToAL equ Vision_GetMaxPioModeToAL
64
65
66;--------------------------------------------------------------------
67; AdvAtaInit_InitializeControllerForDPTinDSDI
68; Parameters:
69; DS:DI: Ptr to DPT for Single or Slave Drive
70; Returns:
71; CF: Cleared if success or no controller to initialize
72; Set if error
73; Corrupts registers:
74; AX, BX, CX, DX
75;--------------------------------------------------------------------
76AdvAtaInit_InitializeControllerForDPTinDSDI:
77 ; Call Controller Specific initialization function
78 mov ax, [di+DPT_ADVANCED_ATA.wControllerID]
79 test ax, ax
80 jz SHORT .NoAdvancedController ; Return with CF cleared
81
82 push bp
83 push si
84
85 ; We only support Vision at the moment so no need to identify ID
86 call AdvAtaInit_LoadMasterDPTtoDSSIifSlaveInDSDI
87 call Vision_InitializeWithIDinAHandConfigInAL
88
89 pop si
90 pop bp
91
92.NoAdvancedController:
93 ret
94
95
96;--------------------------------------------------------------------
97; AdvAtaInit_LoadMasterDPTtoDSSIifSlaveInDSDI
98; Parameters:
99; DS:DI: Ptr to DPT for Single or Slave Drive
100; Returns:
101; DS:DI: Ptr to DPT for Single or Slave Drive
102; SI: Offset to Master DPT if Slave Drive present
103; Zero if Slave Drive not present
104; Corrupts registers:
105; AX
106;--------------------------------------------------------------------
107AdvAtaInit_LoadMasterDPTtoDSSIifSlaveInDSDI:
108 ; Must be Slave Drive if previous DPT has same IDEVARS offset
109 lea si, [di-LARGEST_DPT_SIZE] ; DS:SI points to previous DPT
110 mov al, [di+DPT.bIdevarsOffset]
111 cmp al, [si+DPT.bIdevarsOffset]
112 je SHORT .MasterAndSlaveDrivePresent
113
114 ; We only have single drive so zero SI
115 xor si, si
116.MasterAndSlaveDrivePresent:
117 ret
118
119
120;--------------------------------------------------------------------
121; AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI
122; Parameters:
123; DS:DI: Ptr to DPT for Single or Slave Drive
124; SI: Offset to Master DPT if Slave Drive present
125; Zero if Slave Drive not present
126; Returns:
127; BX: Best common PIO mode
128; CX: Slowest common PIO Cycle Time in nanosecs
129; Corrupts registers:
130; Nothing
131;--------------------------------------------------------------------
132AdvAtaInit_SelectSlowestCommonPioTimingsToBXandCXfromDSSIandDSDI:
133 eMOVZX bx, [di+DPT_ADVANCED_ATA.bPioMode]
134 mov cx, [di+DPT_ADVANCED_ATA.wMinPioCycleTime]
135 test si, si
136 jz SHORT .PioTimingsLoadedToAXandCX
137 MIN_U bl, [si+DPT_ADVANCED_ATA.bPioMode]
138 MAX_U cx, [si+DPT_ADVANCED_ATA.wMinPioCycleTime]
139.PioTimingsLoadedToAXandCX:
140 ret
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