source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeWait.asm@ 569

Last change on this file since 569 was 567, checked in by krille_n_@…, 10 years ago

Changes:

  • Renamed MODULE_FEATURE_SETS to MODULE_POWER_MANAGEMENT.
  • Renamed MODULE_VERY_LATE_INITIALIZATION to MODULE_VERY_LATE_INIT and removed it from the official builds.
  • Removed the code that skips detection of slave drives on XT-CF controllers since slave drives can be used with Lo-tech ISA CompactFlash boards.
  • Added autodetection of the SVC ADP50L controller to XTIDECFG.
  • The autodetection of XT-CF controllers now requires MODULE_8BIT_IDE_ADVANCED in the loaded BIOS.
  • Fixed a bug in XTIDECFG from r502 where the "Base (cmd block) address" menu option would be displayed when a serial device was selected as the IDE controller.
  • XTIDECFG would display the "Enable interrupt" menu option for the XTIDE r1 but not for the XTIDE r2. It's now displayed for both controller types.
  • Disabled the "Internal Write Cache" menu option in the Master/Slave Drive menus for serial device type drives.
  • Optimizations and other fixes.
File size: 4.6 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : IDE Device wait functions.
3
4;
5; XTIDE Universal BIOS and Associated Tools
6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
12;
13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
19
20; Section containing code
21SECTION .text
22
23;--------------------------------------------------------------------
24; IdeWait_IRQorDRQ
25; Parameters:
26; DS:DI: Ptr to DPT (in RAMVARS segment)
27; SS:BP: Ptr to IDEPACK, PIOVARS or MEMPIOVARS
28; Returns:
29; AH: INT 13h Error Code
30; CF: Cleared if success, Set if error
31; Corrupts registers:
32; AL, BX, CX, DX
33;--------------------------------------------------------------------
34IdeWait_IRQorDRQ:
35 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_DRQ)
36
37%ifdef MODULE_IRQ
38 test BYTE [bp+IDEPACK.bDeviceControl], FLG_DEVCONTROL_nIEN
39 jnz SHORT IdeWait_PollStatusFlagInBLwithTimeoutInBH ; Interrupt disabled
40%endif
41 ; Fall to IdeWait_IRQorStatusFlagInBLwithTimeoutInBH
42
43
44;--------------------------------------------------------------------
45; IdeWait_IRQorStatusFlagInBLwithTimeoutInBH
46; Parameters:
47; BH: Timeout ticks
48; BL: IDE Status Register bit to wait
49; DS:DI: Ptr to DPT (in RAMVARS segment)
50; Returns:
51; AH: INT 13h Error Code
52; CF: Cleared if success, Set if error
53; Corrupts registers:
54; AL, BX, CX, DX
55;--------------------------------------------------------------------
56IdeWait_IRQorStatusFlagInBLwithTimeoutInBH:
57%ifdef MODULE_IRQ
58 call IdeIrq_WaitForIRQ
59%endif
60 ; Always fall to IdeWait_PollStatusFlagInBLwithTimeoutInBH for error processing
61
62
63;--------------------------------------------------------------------
64; IdeWait_PollStatusFlagInBLwithTimeoutInBH
65; Parameters:
66; BH: Timeout ticks
67; BL: IDE Status Register bit to poll
68; DS:DI: Ptr to DPT (in RAMVARS segment)
69; Returns:
70; AH: INT 13h Error Code
71; CF: Cleared if success, Set if error
72; Corrupts registers:
73; AL, BX, CX, DX
74;--------------------------------------------------------------------
75IdeWait_PollStatusFlagInBLwithTimeoutInBH:
76 mov ah, bl
77 mov cl, bh
78 call Timer_InitializeTimeoutWithTicksInCL
79 call IdeIO_InputStatusRegisterToAL ; Discard contents of first read
80 and ah, ~FLG_STATUS_BSY
81 jz SHORT PollBsyOnly
82 ; Fall to PollBsyAndFlgInAH
83
84;--------------------------------------------------------------------
85; PollBsyAndFlgInAH
86; Parameters:
87; AH: Status Register Flag to poll (until set) when device not busy
88; DS:DI: Ptr to DPT (in RAMVARS segment)
89; Returns:
90; AH: BIOS Error code
91; CF: Clear if wait completed successfully (no errors)
92; Set if any error
93; Corrupts registers:
94; AL, BX, CX, DX
95;--------------------------------------------------------------------
96PollBsyAndFlgInAH:
97.PollLoop:
98 call IdeIO_InputStatusRegisterToAL
99 test al, FLG_STATUS_BSY ; Controller busy?
100 jnz SHORT .UpdateTimeout ; If so, jump to timeout update
101 test al, ah ; Test secondary flag
102 jnz SHORT IdeError_GetBiosErrorCodeToAHfromPolledStatusRegisterInAL
103.UpdateTimeout:
104 call Timer_SetCFifTimeout
105 jnc SHORT .PollLoop ; Loop if time left
106 call IdeError_GetBiosErrorCodeToAHfromPolledStatusRegisterInAL
107 jc SHORT .ReturnErrorCodeInAH
108 mov ah, RET_HD_TIMEOUT ; Expected bit never got set
109 stc
110.ReturnErrorCodeInAH:
111 ret
112
113
114;--------------------------------------------------------------------
115; PollBsyOnly
116; Parameters:
117; DS:DI: Ptr to DPT (in RAMVARS segment)
118; Returns:
119; AH: BIOS Error code
120; CF: Clear if wait completed successfully (no errors)
121; Set if any error
122; Corrupts registers:
123; AL, BX, CX, DX
124;--------------------------------------------------------------------
125PollBsyOnly:
126.PollLoop:
127 call IdeIO_InputStatusRegisterToAL
128 test al, FLG_STATUS_BSY ; Controller busy?
129 jz SHORT IdeError_GetBiosErrorCodeToAHfromPolledStatusRegisterInAL
130 call Timer_SetCFifTimeout ; Update timeout counter
131 jnc SHORT .PollLoop ; Loop if time left (sets CF on timeout)
132.End: ; Label used for sanity check during assembly
133 ; Fall to IdeError_GetBiosErrorCodeToAHfromPolledStatusRegisterInAL
134
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