[150] | 1 | ; Project name : XTIDE Universal BIOS |
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| 2 | ; Description : IDE Device transfer functions. |
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| 3 | |
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[376] | 4 | ; |
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[445] | 5 | ; XTIDE Universal BIOS and Associated Tools |
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[526] | 6 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team. |
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[376] | 7 | ; |
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| 8 | ; This program is free software; you can redistribute it and/or modify |
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| 9 | ; it under the terms of the GNU General Public License as published by |
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| 10 | ; the Free Software Foundation; either version 2 of the License, or |
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| 11 | ; (at your option) any later version. |
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[445] | 12 | ; |
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[376] | 13 | ; This program is distributed in the hope that it will be useful, |
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| 14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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[445] | 16 | ; GNU General Public License for more details. |
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[376] | 17 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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[445] | 18 | ; |
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[376] | 19 | |
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[150] | 20 | ; Structure containing variables for PIO transfer functions. |
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| 21 | ; This struct must not be larger than IDEPACK without INTPACK. |
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[414] | 22 | struc PIOVARS ; Must not be larger than 9 bytes! See IDEPACK in RamVars.inc. |
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| 23 | .wDataPort resb 2 ; 0-1, IDE Data Port |
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| 24 | .fnXfer resb 2 ; 2-3, Offset to transfer function |
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| 25 | .wSectorsInBlock resb 2 ; 4-5, Block size in sectors |
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[363] | 26 | .bSectorsLeft resb 1 ; 6, Sectors left to transfer |
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[218] | 27 | resb 1 ; 7, IDEPACK.bDeviceControl |
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[363] | 28 | .bSectorsDone resb 1 ; 8, Number of sectors xferred |
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[150] | 29 | endstruc |
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| 30 | |
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| 31 | |
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| 32 | ; Section containing code |
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| 33 | SECTION .text |
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| 34 | |
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| 35 | ;-------------------------------------------------------------------- |
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| 36 | ; IdeTransfer_StartWithCommandInAL |
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| 37 | ; Parameters: |
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| 38 | ; AL: IDE command that was used to start the transfer |
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[171] | 39 | ; (all PIO read and write commands including Identify Device) |
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[480] | 40 | ; ES:SI: Ptr to data buffer |
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[150] | 41 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 42 | ; SS:BP: Ptr to IDEPACK |
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| 43 | ; Returns: |
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| 44 | ; AH: INT 13h Error Code |
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[218] | 45 | ; CX: Number of successfully transferred sectors |
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[150] | 46 | ; CF: Cleared if success, Set if error |
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| 47 | ; Corrupts registers: |
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[218] | 48 | ; AL, BX, DX, SI, ES |
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[150] | 49 | ;-------------------------------------------------------------------- |
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| 50 | ALIGN JUMP_ALIGN |
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| 51 | IdeTransfer_StartWithCommandInAL: |
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[157] | 52 | ; Are we reading or writing? |
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[171] | 53 | test al, 16 ; Bit 4 is cleared on all the read commands but set on 3 of the 4 write commands |
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[242] | 54 | mov ah, [bp+IDEPACK.bSectorCount] |
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| 55 | jnz SHORT WriteToDrive |
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[171] | 56 | cmp al, COMMAND_WRITE_MULTIPLE |
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[242] | 57 | je SHORT WriteToDrive |
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| 58 | ; Fall to ReadFromDrive |
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[150] | 59 | |
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| 60 | ;-------------------------------------------------------------------- |
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[242] | 61 | ; ReadFromDrive |
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[150] | 62 | ; Parameters: |
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[242] | 63 | ; AH: Number of sectors to transfer (1...128) |
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[480] | 64 | ; ES:SI: Ptr to buffer to receive data |
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[150] | 65 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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| 66 | ; SS:BP: Ptr to PIOVARS |
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| 67 | ; Returns: |
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[242] | 68 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[150] | 69 | ; AH: BIOS Error code |
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[218] | 70 | ; CX: Number of successfully transferred sectors |
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[294] | 71 | ; CF: 0 if transfer successful |
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[150] | 72 | ; 1 if any error |
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| 73 | ; Corrupts registers: |
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[218] | 74 | ; AL, BX, DX, SI, ES |
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[150] | 75 | ;-------------------------------------------------------------------- |
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[242] | 76 | ReadFromDrive: |
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| 77 | ; Prepare to read data to ESSI |
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| 78 | mov bx, g_rgfnPioRead |
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| 79 | call InitializePiovarsInSSBPwithSectorCountInAH |
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[538] | 80 | %ifdef USE_AT |
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| 81 | jc SHORT ReturnWithTransferErrorInAH |
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| 82 | %endif |
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[242] | 83 | |
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| 84 | ; Wait until drive is ready to transfer |
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| 85 | call IdeWait_IRQorDRQ ; Wait until ready to transfer |
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[218] | 86 | jc SHORT ReturnWithTransferErrorInAH |
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[242] | 87 | xchg si, di ; ES:DI now points buffer |
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[218] | 88 | |
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[363] | 89 | mov cx, [bp+PIOVARS.wSectorsInBlock] ; Max 128 |
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[242] | 90 | |
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[150] | 91 | ALIGN JUMP_ALIGN |
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[242] | 92 | .ReadNextBlockFromDrive: |
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[150] | 93 | mov dx, [bp+PIOVARS.wDataPort] |
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[363] | 94 | cmp [bp+PIOVARS.bSectorsLeft], cl |
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[242] | 95 | jbe SHORT .ReadLastBlockFromDrive |
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[218] | 96 | call [bp+PIOVARS.fnXfer] |
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[169] | 97 | |
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[218] | 98 | ; Wait until ready for next block and check for errors |
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[242] | 99 | xchg di, si ; DS:DI now points DPT |
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[218] | 100 | call IdeWait_IRQorDRQ ; Wait until ready to transfer |
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| 101 | jc SHORT ReturnWithTransferErrorInAH |
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[242] | 102 | xchg si, di ; ES:DI now points buffer |
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[169] | 103 | |
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[363] | 104 | ; Increment number of successfully read sectors |
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| 105 | mov cx, [bp+PIOVARS.wSectorsInBlock] |
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| 106 | sub [bp+PIOVARS.bSectorsLeft], cl |
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| 107 | add [bp+PIOVARS.bSectorsDone], cl |
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[242] | 108 | jmp SHORT .ReadNextBlockFromDrive |
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[150] | 109 | |
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| 110 | ALIGN JUMP_ALIGN |
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[242] | 111 | .ReadLastBlockFromDrive: |
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[363] | 112 | mov cl, [bp+PIOVARS.bSectorsLeft] ; CH is already zero |
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[419] | 113 | push cx |
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[150] | 114 | call [bp+PIOVARS.fnXfer] ; Transfer possibly partial block |
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| 115 | |
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[242] | 116 | ; Check for errors in last block |
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| 117 | mov di, si ; DS:DI now points DPT |
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| 118 | CheckErrorsAfterTransferringLastBlock: |
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[417] | 119 | mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_BSY) |
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[242] | 120 | call IdeWait_PollStatusFlagInBLwithTimeoutInBH |
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[419] | 121 | pop cx ; [bp+PIOVARS.bSectorsLeft] |
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| 122 | jc SHORT ReturnWithTransferErrorInAH |
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[150] | 123 | |
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[445] | 124 | ; All sectors successfully transferred |
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[419] | 125 | add cx, [bp+PIOVARS.bSectorsDone] ; Never sets CF |
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| 126 | ret |
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| 127 | |
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[242] | 128 | ; Return number of successfully read sectors |
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| 129 | ReturnWithTransferErrorInAH: |
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[370] | 130 | %ifdef USE_386 |
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| 131 | movzx cx, [bp+PIOVARS.bSectorsDone] |
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| 132 | %else |
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[363] | 133 | mov cl, [bp+PIOVARS.bSectorsDone] |
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| 134 | mov ch, 0 ; Preserve CF |
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[370] | 135 | %endif |
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[242] | 136 | ret |
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| 137 | |
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| 138 | |
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[150] | 139 | ;-------------------------------------------------------------------- |
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[242] | 140 | ; WriteToDrive |
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[150] | 141 | ; Parameters: |
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[242] | 142 | ; AH: Number of sectors to transfer (1...128) |
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| 143 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[480] | 144 | ; ES:SI: Ptr to buffer containing data |
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[150] | 145 | ; SS:BP: Ptr to PIOVARS |
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| 146 | ; Returns: |
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| 147 | ; AH: BIOS Error code |
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[218] | 148 | ; CX: Number of successfully transferred sectors |
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[294] | 149 | ; CF: 0 if transfer successful |
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[150] | 150 | ; 1 if any error |
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| 151 | ; Corrupts registers: |
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[218] | 152 | ; AL, BX, DX, SI, ES |
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[150] | 153 | ;-------------------------------------------------------------------- |
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| 154 | ALIGN JUMP_ALIGN |
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[242] | 155 | WriteToDrive: |
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| 156 | ; Prepare to write data from ESSI |
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| 157 | mov bx, g_rgfnPioWrite |
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| 158 | call InitializePiovarsInSSBPwithSectorCountInAH |
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[538] | 159 | %ifdef USE_AT |
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| 160 | jc SHORT ReturnWithTransferErrorInAH |
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| 161 | %endif |
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[242] | 162 | |
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| 163 | ; Always poll when writing first block (IRQs are generated for following blocks) |
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| 164 | mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_DRQ) |
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| 165 | call IdeWait_PollStatusFlagInBLwithTimeoutInBH |
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[218] | 166 | jc SHORT ReturnWithTransferErrorInAH |
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[150] | 167 | |
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[363] | 168 | mov cx, [bp+PIOVARS.wSectorsInBlock] ; Max 128 |
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[242] | 169 | |
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[218] | 170 | ALIGN JUMP_ALIGN |
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[242] | 171 | .WriteNextBlockToDrive: |
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[150] | 172 | mov dx, [bp+PIOVARS.wDataPort] |
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[363] | 173 | cmp [bp+PIOVARS.bSectorsLeft], cl |
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[242] | 174 | jbe SHORT .WriteLastBlockToDrive |
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[218] | 175 | call [bp+PIOVARS.fnXfer] |
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[169] | 176 | |
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[218] | 177 | ; Wait until ready for next block and check for errors |
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| 178 | call IdeWait_IRQorDRQ ; Wait until ready to transfer |
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| 179 | jc SHORT ReturnWithTransferErrorInAH |
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[150] | 180 | |
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[363] | 181 | ; Increment number of successfully written sectors |
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| 182 | mov cx, [bp+PIOVARS.wSectorsInBlock] |
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| 183 | sub [bp+PIOVARS.bSectorsLeft], cl |
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| 184 | add [bp+PIOVARS.bSectorsDone], cl |
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[242] | 185 | jmp SHORT .WriteNextBlockToDrive |
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[169] | 186 | |
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[150] | 187 | ALIGN JUMP_ALIGN |
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[242] | 188 | .WriteLastBlockToDrive: |
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[363] | 189 | mov cl, [bp+PIOVARS.bSectorsLeft] ; CH is already zero |
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[419] | 190 | push cx |
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[242] | 191 | %ifdef USE_186 |
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| 192 | push CheckErrorsAfterTransferringLastBlock |
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| 193 | jmp [bp+PIOVARS.fnXfer] ; Transfer possibly partial block |
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| 194 | %else |
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[150] | 195 | call [bp+PIOVARS.fnXfer] ; Transfer possibly partial block |
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[242] | 196 | jmp SHORT CheckErrorsAfterTransferringLastBlock |
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| 197 | %endif |
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[218] | 198 | |
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[150] | 199 | |
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| 200 | ;-------------------------------------------------------------------- |
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[218] | 201 | ; InitializePiovarsInSSBPwithSectorCountInAH |
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[150] | 202 | ; Parameters: |
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[218] | 203 | ; AH: Number of sectors to transfer (1...128) |
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[150] | 204 | ; BX: Offset to transfer function lookup table |
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| 205 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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[480] | 206 | ; ES:SI: Ptr to data buffer |
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[169] | 207 | ; SS:BP: Ptr to PIOVARS |
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[167] | 208 | ; Returns: |
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[538] | 209 | ; ES:SI: Normalized pointer |
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| 210 | ; AH: INT 13h Error Code (only when CF set) |
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| 211 | ; CF: Set of failed to normalize pointer (segment overflow) |
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| 212 | ; Cleared if success |
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[150] | 213 | ; Corrupts registers: |
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[538] | 214 | ; AL, BX, DX |
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[150] | 215 | ;-------------------------------------------------------------------- |
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| 216 | ALIGN JUMP_ALIGN |
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[218] | 217 | InitializePiovarsInSSBPwithSectorCountInAH: |
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[473] | 218 | ; Store sizes and Data Port |
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[363] | 219 | mov [bp+PIOVARS.bSectorsLeft], ah |
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[538] | 220 | %ifdef USE_AT |
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| 221 | xchg dx, ax |
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| 222 | %endif |
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[473] | 223 | mov ax, [di+DPT.wBasePort] |
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| 224 | mov [bp+PIOVARS.wDataPort], ax |
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[370] | 225 | eMOVZX ax, [di+DPT_ATA.bBlockSize] |
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[363] | 226 | mov [bp+PIOVARS.wSectorsInBlock], ax |
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| 227 | mov [bp+PIOVARS.bSectorsDone], ah ; Zero |
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[150] | 228 | |
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| 229 | ; Get transfer function based on bus type |
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[158] | 230 | xchg ax, bx ; Lookup table offset to AX |
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[400] | 231 | mov bl, [di+DPT_ATA.bDevice] |
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[493] | 232 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[480] | 233 | mov dl, bl |
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| 234 | %endif |
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[150] | 235 | add bx, ax |
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| 236 | mov ax, [cs:bx] ; Load offset to transfer function |
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| 237 | mov [bp+PIOVARS.fnXfer], ax |
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[480] | 238 | |
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| 239 | ; Normalize pointer for PIO-transfers and convert to physical address for DMA transfers |
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[493] | 240 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[480] | 241 | cmp dl, DEVICE_8BIT_XTCF_DMA |
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| 242 | jb SHORT IdeTransfer_NormalizePointerInESSI |
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| 243 | |
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| 244 | ; Convert ES:SI to physical address |
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[491] | 245 | %ifdef USE_186 ; Bytes EU Cycles(286) |
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| 246 | mov ax, es ; 2 2 |
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| 247 | rol ax, 4 ; 3 9 |
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| 248 | mov dx, ax ; 2 2 |
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| 249 | and ax, BYTE 0Fh; 3 3 |
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| 250 | xor dx, ax ; 2 2 |
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| 251 | add si, dx ; 2 2 |
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| 252 | adc al, ah ; 2 2 |
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| 253 | mov es, ax ; 2 2 |
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| 254 | ;------------------------------------ |
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| 255 | ; 18 24 |
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| 256 | %else ; 808x |
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| 257 | |
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| 258 | %if 0 |
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| 259 | ; Bytes EU Cycles(808x) |
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| 260 | mov al, 4 ; 2 4 |
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| 261 | mov dx, es ; 2 2 |
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| 262 | xchg cx, ax ; 1 3 |
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| 263 | rol dx, cl ; 2 24 |
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| 264 | mov cx, dx ; 2 2 |
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| 265 | xchg cx, ax ; 1 3 |
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| 266 | and ax, BYTE 0Fh; 3 4 |
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| 267 | xor dx, ax ; 2 3 |
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| 268 | add si, dx ; 2 3 |
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| 269 | adc al, ah ; 2 3 |
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| 270 | mov es, ax ; 2 2 |
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| 271 | ;------------------------------------ |
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| 272 | ; 21 53 |
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| 273 | ; |
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| 274 | ; Judging by the Execution Unit cycle count the above block of code is |
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| 275 | ; apparently slower. However, the shifts and rotates in the block below |
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| 276 | ; execute faster than the Bus Interface Unit on an 8088 can fetch them, |
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| 277 | ; thus causing the EU to starve. The difference in true execution speed |
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| 278 | ; (if any) might not be worth the extra 5 bytes. |
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| 279 | ; In other words, we could use a real world test here. |
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| 280 | ; |
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| 281 | %endif ; 0 |
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| 282 | ; Bytes EU Cycles(808x/286) |
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| 283 | xor dx, dx ; 2 3/2 |
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| 284 | mov ax, es ; 2 2/2 |
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[480] | 285 | %rep 4 |
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[491] | 286 | shl ax, 1 ; 8 8/8 |
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| 287 | rcl dx, 1 ; 8 8/8 |
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[480] | 288 | %endrep |
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[491] | 289 | add si, ax ; 2 3/2 |
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| 290 | adc dl, dh ; 2 3/2 |
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| 291 | mov es, dx ; 2 2/2 |
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| 292 | ;------------------------------------ |
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| 293 | %endif ; 26 29/26 |
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[538] | 294 | clc |
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[150] | 295 | ret |
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[493] | 296 | %endif ; MODULE_8BIT_IDE_ADVANCED |
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[480] | 297 | ; Fall to IdeTransfer_NormalizePointerInESSI if no MODULE_8BIT_IDE |
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[150] | 298 | |
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| 299 | |
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[480] | 300 | ;-------------------------------------------------------------------- |
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| 301 | ; IdeTransfer_NormalizePointerInESSI |
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| 302 | ; Parameters: |
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[538] | 303 | ; DH: Number of sectors to transfer (when USE_AT defined) |
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[480] | 304 | ; ES:SI: Ptr to be normalized |
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| 305 | ; Returns: |
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| 306 | ; ES:SI: Normalized pointer (SI = 0...15) |
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[538] | 307 | ; AH: INT 13h Error Code (only when CF set) |
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| 308 | ; CF: Set of failed to normalize pointer (segment overflow) |
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| 309 | ; Cleared if success |
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[480] | 310 | ; Corrupts registers: |
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| 311 | ; AX, DX |
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| 312 | ;-------------------------------------------------------------------- |
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| 313 | IdeTransfer_NormalizePointerInESSI: |
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[538] | 314 | ; Normalization can cause segment overflow if it is done when not needed |
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| 315 | ; (I don't know if any software calls with such seg:off address). |
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| 316 | ; This does not apply to XT systems since nothing will write to main BIOS ROM. |
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| 317 | ; On AT systems things are quite different, even in protected mode the address |
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| 318 | ; is passed in seg:offset form and HMA is accessible in real mode. |
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| 319 | %ifdef USE_AT |
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| 320 | xor dl, dl |
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| 321 | shl dx, 1 |
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| 322 | dec dx ; Prevents normalization when bytes + offset will be zero |
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| 323 | add dx, si |
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| 324 | jc SHORT .NormalizationRequired |
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| 325 | ret |
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| 326 | .NormalizationRequired: |
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| 327 | %endif ; USE_AT |
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| 328 | |
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[480] | 329 | NORMALIZE_FAR_POINTER es, si, ax, dx |
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[538] | 330 | %ifdef USE_AT ; CF is always clear for XT builds |
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| 331 | mov ah, 0 ; Clear AH and preserve CF |
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| 332 | rcl ah, 1 ; RET_HD_INVALID |
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| 333 | %endif |
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[480] | 334 | ret |
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[400] | 335 | |
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[480] | 336 | |
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[538] | 337 | |
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[150] | 338 | ; Lookup tables to get transfer function based on bus type |
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| 339 | ALIGN WORD_ALIGN |
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| 340 | g_rgfnPioRead: |
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[473] | 341 | dw IdePioBlock_ReadFrom16bitDataPort ; 0, DEVICE_16BIT_ATA |
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| 342 | dw IdePioBlock_ReadFrom32bitDataPort ; 1, DEVICE_32BIT_ATA |
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[400] | 343 | %ifdef MODULE_8BIT_IDE |
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[480] | 344 | dw IdePioBlock_ReadFrom8bitDataPort ; 2, DEVICE_8BIT_ATA |
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[491] | 345 | dw IdePioBlock_ReadFromXtideRev1 ; 3, DEVICE_8BIT_XTIDE_REV1 |
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[480] | 346 | dw IdePioBlock_ReadFromXtideRev2 ; 4, DEVICE_8BIT_XTIDE_REV2 |
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[493] | 347 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[480] | 348 | dw IdePioBlock_ReadFrom8bitDataPort ; 5, DEVICE_8BIT_XTCF_PIO8 |
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| 349 | dw IdeDmaBlock_ReadFromXTCF ; 6, DEVICE_8BIT_XTCF_DMA |
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[473] | 350 | %endif |
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[493] | 351 | %endif |
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[400] | 352 | |
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[480] | 353 | |
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[473] | 354 | g_rgfnPioWrite: |
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| 355 | dw IdePioBlock_WriteTo16bitDataPort ; 0, DEVICE_16BIT_ATA |
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| 356 | dw IdePioBlock_WriteTo32bitDataPort ; 1, DEVICE_32BIT_ATA |
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[400] | 357 | %ifdef MODULE_8BIT_IDE |
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[480] | 358 | dw IdePioBlock_WriteTo8bitDataPort ; 2, DEVICE_8BIT_ATA |
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| 359 | dw IdePioBlock_WriteToXtideRev1 ; 3, DEVICE_8BIT_XTIDE_REV1 |
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| 360 | dw IdePioBlock_WriteToXtideRev2 ; 4, DEVICE_8BIT_XTIDE_REV2 |
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[526] | 361 | %ifdef MODULE_8BIT_IDE_ADVANCED |
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[480] | 362 | dw IdePioBlock_WriteTo8bitDataPort ; 5, DEVICE_8BIT_XTCF_PIO8 |
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| 363 | dw IdeDmaBlock_WriteToXTCF ; 6, DEVICE_8BIT_XTCF_DMA |
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[361] | 364 | %endif |
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[493] | 365 | %endif |
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