source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeTransfer.asm@ 380

Last change on this file since 380 was 376, checked in by gregli@…, 13 years ago

WIDE checkin... Added copyright and license information to sorce files, as per the GPL instructions for usage.
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[150]1; Project name : XTIDE Universal BIOS
2; Description : IDE Device transfer functions.
3
[376]4;
5; XTIDE Universal BIOS and Associated Tools
6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
12;
13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
19
[150]20; Structure containing variables for PIO transfer functions.
21; This struct must not be larger than IDEPACK without INTPACK.
22struc PIOVARS
[363]23 .wDataPort resb 2 ; 0, IDE Data Port
24 .fnXfer resb 2 ; 2, Offset to transfer function
25 .wSectorsInBlock resb 2 ; 4, Block size in sectors
26 .bSectorsLeft resb 1 ; 6, Sectors left to transfer
[218]27 resb 1 ; 7, IDEPACK.bDeviceControl
[363]28 .bSectorsDone resb 1 ; 8, Number of sectors xferred
[150]29endstruc
30
31
32; Section containing code
33SECTION .text
34
35;--------------------------------------------------------------------
36; IdeTransfer_StartWithCommandInAL
37; Parameters:
38; AL: IDE command that was used to start the transfer
[171]39; (all PIO read and write commands including Identify Device)
[218]40; ES:SI: Ptr to normalized data buffer
[150]41; DS:DI: Ptr to DPT (in RAMVARS segment)
42; SS:BP: Ptr to IDEPACK
43; Returns:
44; AH: INT 13h Error Code
[218]45; CX: Number of successfully transferred sectors
[150]46; CF: Cleared if success, Set if error
47; Corrupts registers:
[218]48; AL, BX, DX, SI, ES
[150]49;--------------------------------------------------------------------
50ALIGN JUMP_ALIGN
51IdeTransfer_StartWithCommandInAL:
[157]52 ; Are we reading or writing?
[171]53 test al, 16 ; Bit 4 is cleared on all the read commands but set on 3 of the 4 write commands
[242]54 mov ah, [bp+IDEPACK.bSectorCount]
55 jnz SHORT WriteToDrive
[171]56 cmp al, COMMAND_WRITE_MULTIPLE
[242]57 je SHORT WriteToDrive
58 ; Fall to ReadFromDrive
[150]59
60;--------------------------------------------------------------------
[242]61; ReadFromDrive
[150]62; Parameters:
[242]63; AH: Number of sectors to transfer (1...128)
64; ES:SI: Normalized ptr to buffer to receive data
[150]65; DS:DI: Ptr to DPT (in RAMVARS segment)
66; SS:BP: Ptr to PIOVARS
67; Returns:
[242]68; DS:DI: Ptr to DPT (in RAMVARS segment)
[150]69; AH: BIOS Error code
[218]70; CX: Number of successfully transferred sectors
[294]71; CF: 0 if transfer successful
[150]72; 1 if any error
73; Corrupts registers:
[218]74; AL, BX, DX, SI, ES
[150]75;--------------------------------------------------------------------
[242]76ReadFromDrive:
77 ; Prepare to read data to ESSI
78 mov bx, g_rgfnPioRead
79 call InitializePiovarsInSSBPwithSectorCountInAH
80
81 ; Wait until drive is ready to transfer
82 call IdeWait_IRQorDRQ ; Wait until ready to transfer
[218]83 jc SHORT ReturnWithTransferErrorInAH
[242]84 xchg si, di ; ES:DI now points buffer
[218]85
[363]86 mov cx, [bp+PIOVARS.wSectorsInBlock] ; Max 128
[242]87
[150]88ALIGN JUMP_ALIGN
[242]89.ReadNextBlockFromDrive:
[150]90 mov dx, [bp+PIOVARS.wDataPort]
[363]91 cmp [bp+PIOVARS.bSectorsLeft], cl
[242]92 jbe SHORT .ReadLastBlockFromDrive
[218]93 call [bp+PIOVARS.fnXfer]
[169]94
[218]95 ; Wait until ready for next block and check for errors
[242]96 xchg di, si ; DS:DI now points DPT
[218]97 call IdeWait_IRQorDRQ ; Wait until ready to transfer
98 jc SHORT ReturnWithTransferErrorInAH
[242]99 xchg si, di ; ES:DI now points buffer
[169]100
[363]101 ; Increment number of successfully read sectors
102 mov cx, [bp+PIOVARS.wSectorsInBlock]
103 sub [bp+PIOVARS.bSectorsLeft], cl
104 add [bp+PIOVARS.bSectorsDone], cl
[242]105 jmp SHORT .ReadNextBlockFromDrive
[150]106
107ALIGN JUMP_ALIGN
[242]108.ReadLastBlockFromDrive:
[363]109 mov cl, [bp+PIOVARS.bSectorsLeft] ; CH is already zero
[150]110 call [bp+PIOVARS.fnXfer] ; Transfer possibly partial block
111
[242]112 ; Check for errors in last block
113 mov di, si ; DS:DI now points DPT
114CheckErrorsAfterTransferringLastBlock:
115 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_DRDY)
116 call IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]117
[242]118 ; Return number of successfully read sectors
119ReturnWithTransferErrorInAH:
[370]120%ifdef USE_386
121 movzx cx, [bp+PIOVARS.bSectorsDone]
122%else
[363]123 mov cl, [bp+PIOVARS.bSectorsDone]
124 mov ch, 0 ; Preserve CF
[370]125%endif
[242]126 ret
127
128
[150]129;--------------------------------------------------------------------
[242]130; WriteToDrive
[150]131; Parameters:
[242]132; AH: Number of sectors to transfer (1...128)
133; DS:DI: Ptr to DPT (in RAMVARS segment)
134; ES:SI: Normalized ptr to buffer containing data
[150]135; SS:BP: Ptr to PIOVARS
136; Returns:
137; AH: BIOS Error code
[218]138; CX: Number of successfully transferred sectors
[294]139; CF: 0 if transfer successful
[150]140; 1 if any error
141; Corrupts registers:
[218]142; AL, BX, DX, SI, ES
[150]143;--------------------------------------------------------------------
144ALIGN JUMP_ALIGN
[242]145WriteToDrive:
146 ; Prepare to write data from ESSI
147 mov bx, g_rgfnPioWrite
148 call InitializePiovarsInSSBPwithSectorCountInAH
149
150 ; Always poll when writing first block (IRQs are generated for following blocks)
151 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_DRQ)
152 call IdeWait_PollStatusFlagInBLwithTimeoutInBH
[218]153 jc SHORT ReturnWithTransferErrorInAH
[150]154
[363]155 mov cx, [bp+PIOVARS.wSectorsInBlock] ; Max 128
[242]156
[218]157ALIGN JUMP_ALIGN
[242]158.WriteNextBlockToDrive:
[150]159 mov dx, [bp+PIOVARS.wDataPort]
[363]160 cmp [bp+PIOVARS.bSectorsLeft], cl
[242]161 jbe SHORT .WriteLastBlockToDrive
[218]162 call [bp+PIOVARS.fnXfer]
[169]163
[218]164 ; Wait until ready for next block and check for errors
165 call IdeWait_IRQorDRQ ; Wait until ready to transfer
166 jc SHORT ReturnWithTransferErrorInAH
[150]167
[363]168 ; Increment number of successfully written sectors
169 mov cx, [bp+PIOVARS.wSectorsInBlock]
170 sub [bp+PIOVARS.bSectorsLeft], cl
171 add [bp+PIOVARS.bSectorsDone], cl
[242]172 jmp SHORT .WriteNextBlockToDrive
[169]173
[150]174ALIGN JUMP_ALIGN
[242]175.WriteLastBlockToDrive:
[363]176 mov cl, [bp+PIOVARS.bSectorsLeft] ; CH is already zero
[242]177%ifdef USE_186
178 push CheckErrorsAfterTransferringLastBlock
179 jmp [bp+PIOVARS.fnXfer] ; Transfer possibly partial block
180%else
[150]181 call [bp+PIOVARS.fnXfer] ; Transfer possibly partial block
[242]182 jmp SHORT CheckErrorsAfterTransferringLastBlock
183%endif
[218]184
[150]185
186;--------------------------------------------------------------------
[218]187; InitializePiovarsInSSBPwithSectorCountInAH
[150]188; Parameters:
[218]189; AH: Number of sectors to transfer (1...128)
[150]190; BX: Offset to transfer function lookup table
191; DS:DI: Ptr to DPT (in RAMVARS segment)
[169]192; SS:BP: Ptr to PIOVARS
[167]193; Returns:
[169]194; Nothing
[150]195; Corrupts registers:
[242]196; AX, BX, DX
[150]197;--------------------------------------------------------------------
198ALIGN JUMP_ALIGN
[218]199InitializePiovarsInSSBPwithSectorCountInAH:
200 ; Store sizes
[363]201 mov [bp+PIOVARS.bSectorsLeft], ah
[370]202 eMOVZX ax, [di+DPT_ATA.bBlockSize]
[363]203 mov [bp+PIOVARS.wSectorsInBlock], ax
204 mov [bp+PIOVARS.bSectorsDone], ah ; Zero
[150]205
206 ; Get transfer function based on bus type
[158]207 xchg ax, bx ; Lookup table offset to AX
[242]208 mov bl, [di+DPT.bIdevarsOffset] ; CS:BX now points to IDEVARS
[150]209 mov dx, [cs:bx+IDEVARS.wPort] ; Load IDE Data port address
[363]210%ifdef MODULE_ADVANCED_ATA
[364]211 mov bl, [di+DPT_ADVANCED_ATA.bDevice]
[363]212%else
[150]213 mov bl, [cs:bx+IDEVARS.bDevice] ; Load device type to BX
[363]214%endif
[150]215 add bx, ax
[363]216
[242]217 mov [bp+PIOVARS.wDataPort], dx
[150]218 mov ax, [cs:bx] ; Load offset to transfer function
219 mov [bp+PIOVARS.fnXfer], ax
220 ret
221
222
223;--------------------------------------------------------------------
[361]224; ReadBlockFromXtideRev1 XTIDE rev 1
225; ReadBlockFromXtideRev2 XTIDE rev 2 or rev 1 with swapped A0 and A3 (chuck-mod)
226; ReadBlockFrom16bitDataPort Normal 16-bit IDE
227; ReadBlockFrom32bitDataPort VLB/PCI 32-bit IDE
[150]228; Parameters:
[363]229; CX: Block size in 512 byte sectors
[150]230; DX: IDE Data port address
[242]231; ES:DI: Normalized ptr to buffer to receive data
[150]232; Returns:
233; Nothing
234; Corrupts registers:
235; AX, BX, CX
236;--------------------------------------------------------------------
237ALIGN JUMP_ALIGN
[361]238ReadBlockFromXtideRev1:
[363]239 UNROLL_SECTORS_IN_CX_TO_QWORDS
[370]240 mov bl, 8 ; Bit mask for toggling data low/high reg
[150]241ALIGN JUMP_ALIGN
242.InswLoop:
[152]243 XTIDE_INSW
244 XTIDE_INSW
245 XTIDE_INSW
246 XTIDE_INSW
[150]247 loop .InswLoop
248 ret
249
[361]250;--------------------------------------------------------------------
251%ifndef USE_186 ; 8086/8088 compatible WORD read
[150]252ALIGN JUMP_ALIGN
[361]253ReadBlockFromXtideRev2:
[363]254 UNROLL_SECTORS_IN_CX_TO_QWORDS
[152]255ALIGN JUMP_ALIGN
256.ReadNextQword:
257 in ax, dx ; Read 1st WORD
258 stosw ; Store 1st WORD to [ES:DI]
259 in ax, dx
260 stosw ; 2nd
261 in ax, dx
262 stosw ; 3rd
263 in ax, dx
264 stosw ; 4th
265 loop .ReadNextQword
266 ret
267%endif
[150]268
[361]269;--------------------------------------------------------------------
[152]270ALIGN JUMP_ALIGN
[361]271ReadBlockFrom16bitDataPort:
[363]272 xchg cl, ch ; Sectors to WORDs
[152]273 rep
274 db 6Dh ; INSW (we want this in XT build)
275 ret
276
[361]277;--------------------------------------------------------------------
[152]278ALIGN JUMP_ALIGN
[361]279ReadBlockFrom32bitDataPort:
[363]280 db 0C1h ; SHL
281 db 0E1h ; CX
282 db 7 ; 7 (Sectors to DWORDs)
[152]283 rep
284 db 66h ; Override operand size to 32-bit
285 db 6Dh ; INSW/INSD
286 ret
287
288
[150]289;--------------------------------------------------------------------
[361]290; WriteBlockToXtideRev1 XTIDE rev 1
291; WriteBlockToXtideRev2 XTIDE rev 2 or rev 1 with swapped A0 and A3 (chuck-mod)
292; WriteBlockToFastXtide Fast XTIDE (CPLD v2 project)
293; WriteBlockTo16bitDataPort Normal 16-bit IDE
294; WriteBlockTo32bitDataPort VLB/PCI 32-bit IDE
[150]295; Parameters:
[363]296; CX: Block size in 512-byte sectors
[150]297; DX: IDE Data port address
298; ES:SI: Normalized ptr to buffer containing data
299; Returns:
300; Nothing
301; Corrupts registers:
302; AX, CX
303;--------------------------------------------------------------------
304ALIGN JUMP_ALIGN
[361]305WriteBlockToXtideRev1:
[150]306 push ds
307 push bx
[363]308 UNROLL_SECTORS_IN_CX_TO_QWORDS
[370]309 mov bl, 8 ; Bit mask for toggling data low/high reg
[152]310 push es ; Copy ES...
311 pop ds ; ...to DS
[150]312ALIGN JUMP_ALIGN
313.OutswLoop:
[152]314 XTIDE_OUTSW
315 XTIDE_OUTSW
316 XTIDE_OUTSW
317 XTIDE_OUTSW
[150]318 loop .OutswLoop
319 pop bx
320 pop ds
321 ret
322
[361]323;--------------------------------------------------------------------
[150]324ALIGN JUMP_ALIGN
[361]325WriteBlockToXtideRev2:
[363]326 UNROLL_SECTORS_IN_CX_TO_QWORDS
[152]327 push ds
328 push es ; Copy ES...
329 pop ds ; ...to DS
330ALIGN JUMP_ALIGN
331.WriteNextQword:
332 XTIDE_MOD_OUTSW
333 XTIDE_MOD_OUTSW
334 XTIDE_MOD_OUTSW
335 XTIDE_MOD_OUTSW
336 loop .WriteNextQword
337 pop ds
338 ret
[150]339
[361]340;--------------------------------------------------------------------
341%ifndef USE_186 ; 8086/8088 compatible WORD write
[152]342ALIGN JUMP_ALIGN
[361]343WriteBlockToFastXtide:
[363]344 UNROLL_SECTORS_IN_CX_TO_QWORDS
[361]345 push ds
346 push es
347 pop ds
348ALIGN JUMP_ALIGN
349.ReadNextQword:
350 lodsw ; Load 1st WORD from [DS:SI]
351 out dx, ax ; Write 1st WORD
352 lodsw
353 out dx, ax ; 2nd
354 lodsw
355 out dx, ax ; 3rd
356 lodsw
357 out dx, ax ; 4th
358 loop .ReadNextQword
359 pop ds
360 ret
361%endif
362
363;--------------------------------------------------------------------
364ALIGN JUMP_ALIGN
365WriteBlockTo16bitDataPort:
[363]366 xchg cl, ch ; Sectors to WORDs
[223]367 es ; Source is ES segment
[152]368 rep
[155]369 db 6Fh ; OUTSW (we want this in XT build)
[152]370 ret
371
[361]372;--------------------------------------------------------------------
[152]373ALIGN JUMP_ALIGN
[361]374WriteBlockTo32bitDataPort:
[363]375 db 0C1h ; SHL
376 db 0E1h ; CX
377 db 7 ; 7 (Sectors to DWORDs)
[223]378 es ; Source is ES segment
[152]379 rep
380 db 66h ; Override operand size to 32-bit
381 db 6Fh ; OUTSW/OUTSD
382 ret
383
384
[361]385
[150]386; Lookup tables to get transfer function based on bus type
387ALIGN WORD_ALIGN
388g_rgfnPioRead:
[361]389 dw ReadBlockFromXtideRev1 ; DEVICE_XTIDE_REV1
[152]390%ifdef USE_186
[361]391 dw ReadBlockFrom16bitDataPort ; DEVICE_XTIDE_REV2
392 dw ReadBlockFrom16bitDataPort ; DEVICE_FAST_XTIDE
[152]393%else
[361]394 dw ReadBlockFromXtideRev2 ; DEVICE_XTIDE_REV2
395 dw ReadBlockFromXtideRev2 ; DEVICE_FAST_XTIDE
[152]396%endif
[361]397 dw ReadBlockFrom16bitDataPort ; DEVICE_16BIT_ATA
398 dw ReadBlockFrom32bitDataPort ; DEVICE_32BIT_ATA
[152]399
[150]400g_rgfnPioWrite:
[361]401 dw WriteBlockToXtideRev1 ; DEVICE_XTIDE_REV1
402 dw WriteBlockToXtideRev2 ; DEVICE_XTIDE_REV2
403%ifdef USE_186
404 dw WriteBlockTo16bitDataPort ; DEVICE_FAST_XTIDE
405%else
406 dw WriteBlockToFastXtide ; DEVICE_FAST_XTIDE
407%endif
408 dw WriteBlockTo16bitDataPort ; DEVICE_16BIT_ATA
409 dw WriteBlockTo32bitDataPort ; DEVICE_32BIT_ATA
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