source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeIO.asm@ 410

Last change on this file since 410 was 400, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Moved 8-bit device support to MODULE_8BIT_IDE.
  • JR-IDE/ISA support requires a lot less bytes.
  • AT builds now always use full operating mode.
File size: 5.1 KB
Line 
1; Project name : XTIDE Universal BIOS
2; Description : IDE Register I/O functions.
3
4;
5; XTIDE Universal BIOS and Associated Tools
6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
12;
13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
19
20; Section containing code
21SECTION .text
22
23;--------------------------------------------------------------------
24; IdeIO_OutputALtoIdeControlBlockRegisterInDL
25; Parameters:
26; AL: Byte to output
27; DL: IDE Control Block Register
28; DS:DI: Ptr to DPT (in RAMVARS segment)
29; Returns:
30; Nothing
31; Corrupts registers:
32; BX, DX
33;--------------------------------------------------------------------
34IdeIO_OutputALtoIdeControlBlockRegisterInDL:
35%ifdef MODULE_8BIT_IDE
36 mov dh, [di+DPT_ATA.bDevice]
37%ifdef MODULE_JRIDE
38 test dh, dh
39 jnz SHORT .OutputToIoMappedIde
40
41 add dx, JRIDE_CONTROL_BLOCK_REGISTER_WINDOW_OFFSET
42 jmp SHORT OutputToJrIdeRegister
43.OutputToIoMappedIde:
44%endif
45%endif
46
47 mov bl, IDEVARS.wPortCtrl
48 jmp SHORT OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL
49
50
51;--------------------------------------------------------------------
52; IdeIO_OutputALtoIdeRegisterInDL
53; Parameters:
54; AL: Byte to output
55; DL: IDE Command Block Register
56; DS:DI: Ptr to DPT (in RAMVARS segment)
57; Returns:
58; Nothing
59; Corrupts registers:
60; BX, DX
61;--------------------------------------------------------------------
62ALIGN JUMP_ALIGN
63IdeIO_OutputALtoIdeRegisterInDL:
64%ifdef MODULE_8BIT_IDE
65 mov dh, [di+DPT_ATA.bDevice]
66%ifdef MODULE_JRIDE
67 test dh, dh
68 jnz SHORT OutputALtoIOmappedIdeRegisterInDL
69
70 add dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
71OutputToJrIdeRegister:
72 mov bx, dx
73 mov [cs:bx], al
74 ret
75ALIGN JUMP_ALIGN
76OutputALtoIOmappedIdeRegisterInDL:
77%endif
78%endif
79
80 mov bl, IDEVARS.wPort
81OutputALtoIdeRegisterInDLwithIdevarsOffsetToBasePortInBL:
82 call GetIdePortToDX
83 out dx, al
84 ret
85
86
87;--------------------------------------------------------------------
88; IdeIO_InputStatusRegisterToAL
89; Parameters:
90; DS:DI: Ptr to DPT (in RAMVARS segment)
91; Returns:
92; AL: IDE Status Register contents
93; Corrupts registers:
94; BX, DX
95;--------------------------------------------------------------------
96ALIGN JUMP_ALIGN
97IdeIO_InputStatusRegisterToAL:
98 mov dl, STATUS_REGISTER_in
99 ; Fall to IdeIO_InputToALfromIdeRegisterInDL
100
101;--------------------------------------------------------------------
102; IdeIO_InputToALfromIdeRegisterInDL
103; Parameters:
104; DL: IDE Register
105; DS:DI: Ptr to DPT (in RAMVARS segment)
106; Returns:
107; AL: Inputted byte
108; Corrupts registers:
109; BX, DX
110;--------------------------------------------------------------------
111IdeIO_InputToALfromIdeRegisterInDL:
112%ifdef MODULE_8BIT_IDE
113 mov dh, [di+DPT_ATA.bDevice]
114%ifdef MODULE_JRIDE
115 test dh, dh
116 jnz SHORT .InputToALfromIOmappedIdeRegisterInDL
117
118 add dx, JRIDE_COMMAND_BLOCK_REGISTER_WINDOW_OFFSET
119 mov bx, dx
120 mov al, [cs:bx]
121 ret
122.InputToALfromIOmappedIdeRegisterInDL:
123%endif
124%endif
125 mov bl, IDEVARS.wPort
126 call GetIdePortToDX
127 in al, dx
128 ret
129
130
131;--------------------------------------------------------------------
132; GetIdePortToDX
133; Parameters:
134; BL: Offset to port in IDEVARS (IDEVARS.wPort or IDEVARS.wPortCtrl)
135; DH: Device Type (IDEVARS.bDevice)
136; DL: IDE Register
137; DS:DI: Ptr to DPT (in RAMVARS segment)
138; Returns:
139; DX: Source/Destination Port
140; Corrupts registers:
141; BX
142;--------------------------------------------------------------------
143ALIGN JUMP_ALIGN
144GetIdePortToDX:
145%ifdef MODULE_8BIT_IDE
146 ; Point CS:BX to IDEVARS
147 xor bh, bh
148 add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address
149
150 ; Load port address and check if A0 and A3 address lines need to be reversed
151 cmp dh, DEVICE_8BIT_XTIDE_REV1
152 mov dh, bh ; DX now has IDE register offset
153 jae SHORT .ReturnUntranslatedPortInDX ; No need to swap address lines
154
155 ; Exchange address lines A0 and A3 from DL
156 add dx, [cs:bx] ; DX now has port address
157 mov bl, dl
158 mov bh, MASK_A3_AND_A0_ADDRESS_LINES
159 and bh, bl ; BH = 0, 1, 8 or 9, we can ignore 0 and 9
160 jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH is 0
161 xor bh, MASK_A3_AND_A0_ADDRESS_LINES
162 jz SHORT .ReturnTranslatedPortInDX ; Jump out since DH was 9
163 and dl, ~MASK_A3_AND_A0_ADDRESS_LINES
164 or dl, bh ; Address lines now reversed
165.ReturnTranslatedPortInDX:
166 ret
167
168.ReturnUntranslatedPortInDX:
169 add dx, [cs:bx]
170 ret
171
172%else ; Only standard IDE devices
173 xor bh, bh
174 xor dh, dh
175 add bl, [di+DPT.bIdevarsOffset] ; CS:BX now points port address
176 add dx, [cs:bx] ; DX now has port address
177 ret
178%endif
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