1 | ; Project name : XTIDE Universal BIOS |
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2 | ; Description : IDE Device DMA transfer functions. |
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3 | |
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4 | ; |
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5 | ; XTIDE Universal BIOS and Associated Tools |
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6 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team. |
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7 | ; |
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8 | ; This program is free software; you can redistribute it and/or modify |
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9 | ; it under the terms of the GNU General Public License as published by |
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10 | ; the Free Software Foundation; either version 2 of the License, or |
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11 | ; (at your option) any later version. |
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12 | ; |
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13 | ; This program is distributed in the hope that it will be useful, |
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14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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16 | ; GNU General Public License for more details. |
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17 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html |
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18 | ; |
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19 | |
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20 | ; Structure containing variables for DMA transfer functions. |
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21 | ; This struct must not be larger than IDEPACK without INTPACK. |
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22 | struc DMAVARS ; Must not be larger than 9 bytes! See IDEPACK in RamVars.inc. |
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23 | .wTotalWordsXferred resb 2 ; 0-1, |
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24 | .wBytesLeftToXferLessOne resb 2 ; 2-3, |
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25 | .bbbPhysicalAddress resb 3 ; 4-6, |
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26 | resb 1 ; 7, IDEPACK.bDeviceControl |
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27 | endstruc |
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28 | |
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29 | |
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30 | ; Section containing code |
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31 | SECTION .text |
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32 | |
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33 | ;-------------------------------------------------------------------- |
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34 | ; IdeDmaTransfer_StartWithCommandInAL |
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35 | ; Parameters: |
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36 | ; AL: IDE command that was used to start the transfer |
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37 | ; (all PIO read and write commands including Identify Device) |
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38 | ; ES:SI: Ptr to data buffer (not normalized) |
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39 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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40 | ; SS:BP: Ptr to IDEPACK |
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41 | ; Returns: |
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42 | ; AH: INT 13h Error Code |
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43 | ; CX: Number of successfully transferred sectors |
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44 | ; CF: Cleared if success, Set if error |
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45 | ; Corrupts registers: |
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46 | ; AL, BX, DX |
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47 | ;-------------------------------------------------------------------- |
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48 | ALIGN JUMP_ALIGN |
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49 | IdeDmaTransfer_StartWithCommandInAL: |
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50 | ; Initialize DMAVARS |
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51 | xor cx, cx |
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52 | mov [bp+DMAVARS.wTotalWordsXferred], cx |
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53 | mov ch, [bp+IDEPACK.bSectorCount] ; CX = WORDs to transfer |
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54 | shl cx, 1 ; WORDs to BYTEs, 0 = 65536 |
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55 | dec cx |
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56 | mov [bp+DMAVARS.wBytesLeftToXferLessOne], cx |
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57 | |
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58 | ; Convert Segment:Offset type pointer to physical address |
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59 | xor bx, bx |
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60 | mov cx, es |
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61 | %rep 4 |
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62 | shl cx, 1 |
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63 | rcl bx, 1 |
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64 | %endrep |
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65 | add cx, si |
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66 | adc bl, bh |
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67 | mov [bp+DMAVARS.bbbPhysicalAddress], cx |
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68 | mov [bp+DMAVARS.bbbPhysicalAddress+2], bl |
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69 | |
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70 | ; Calculate bytes for first page - 1 |
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71 | neg cx ; Max number of bytes for first page, 0 = 65536 |
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72 | dec cx |
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73 | MIN_U cx, [bp+DMAVARS.wBytesLeftToXferLessOne] |
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74 | |
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75 | ; Are we reading or writing? |
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76 | test al, 16 ; Bit 4 is cleared on all the read commands but set on 3 of the 4 write commands |
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77 | jnz SHORT WriteBlockToXTCF |
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78 | cmp al, COMMAND_WRITE_MULTIPLE |
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79 | je SHORT WriteBlockToXTCF |
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80 | ; Fall to ReadBlockFromXTCF |
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81 | |
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82 | |
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83 | ;-------------------------------------------------------------------- |
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84 | ; ReadBlockFromXTCF |
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85 | ; Parameters: |
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86 | ; CX: Bytes in first page - 1 |
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87 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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88 | ; SS:BP: Ptr to DMAVARS |
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89 | ; Returns: |
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90 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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91 | ; AH: BIOS Error code |
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92 | ; CX: Number of successfully transferred sectors |
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93 | ; CF: 0 if transfer successful |
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94 | ; 1 if any error |
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95 | ; Corrupts registers: |
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96 | ; AL, BX, DX |
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97 | ;-------------------------------------------------------------------- |
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98 | ReadBlockFromXTCF: |
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99 | ; 8-bit DMA transfers must be done withing 64k physical page. |
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100 | ; We support maximum of 128 sectors (65536 bytes) per one INT 13h call |
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101 | ; so we might need to separate transfer to 2 separate DMA operations. |
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102 | |
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103 | ; Transfer first DMA page |
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104 | mov ah, CHANNEL_3 | WRITE | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE |
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105 | call StartDMAtransferForXTCFwithDmaModeInAH |
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106 | call UpdateVariablesForSecondPageIfRequired |
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107 | jc SHORT ReturnNumberOfSectorsXferred ; Second page not needed |
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108 | |
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109 | ; Transfer second DMA page if necessary (always less than 64k) |
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110 | mov ah, CHANNEL_3 | WRITE | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE |
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111 | call StartDMAtransferForXTCFwithDmaModeInAH |
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112 | ; Fall to BothDmaPagesTransferred |
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113 | |
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114 | BothDmaPagesTransferred: |
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115 | inc cx ; Never overflows since second page always less than 64k |
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116 | shr cx, 1 ; BYTEs to WORDs |
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117 | add [bp+DMAVARS.wTotalWordsXferred], cx |
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118 | ReturnNumberOfSectorsXferred: |
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119 | mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_BSY) |
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120 | call IdeWait_PollStatusFlagInBLwithTimeoutInBH |
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121 | jc SHORT .ErrorInTransfer |
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122 | mov cx, [bp+DMAVARS.wTotalWordsXferred] |
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123 | xchg cl, ch ; WORDs to sectors |
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124 | ret |
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125 | |
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126 | .ErrorInTransfer: |
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127 | mov cx, 0 ; No way to know how many bytes got xferred |
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128 | ret |
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129 | |
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130 | |
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131 | ;-------------------------------------------------------------------- |
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132 | ; WriteBlockToXTCF |
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133 | ; Parameters: |
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134 | ; CX: Bytes in first page - 1 |
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135 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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136 | ; SS:BP: Ptr to DMAVARS |
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137 | ; Returns: |
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138 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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139 | ; AH: BIOS Error code |
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140 | ; CX: Number of successfully transferred sectors |
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141 | ; CF: 0 if transfer successful |
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142 | ; 1 if any error |
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143 | ; Corrupts registers: |
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144 | ; AL, BX, DX |
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145 | ;-------------------------------------------------------------------- |
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146 | ALIGN JUMP_ALIGN |
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147 | WriteBlockToXTCF: |
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148 | ; Transfer first DMA page |
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149 | mov ah, CHANNEL_3 | READ | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE |
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150 | call StartDMAtransferForXTCFwithDmaModeInAH |
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151 | call UpdateVariablesForSecondPageIfRequired |
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152 | jc SHORT ReturnNumberOfSectorsXferred ; Second page not needed |
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153 | |
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154 | ; Transfer second DMA page if necessary (always less than 64k) |
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155 | mov ah, CHANNEL_3 | READ | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE |
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156 | call StartDMAtransferForXTCFwithDmaModeInAH |
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157 | jmp SHORT BothDmaPagesTransferred |
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158 | |
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159 | |
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160 | ;-------------------------------------------------------------------- |
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161 | ; StartDMAtransferForXTCFwithDmaModeInAH |
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162 | ; Parameters: |
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163 | ; AH: Byte for DMA Mode Register |
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164 | ; CX: Number of BYTEs to transfer - 1 |
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165 | ; DS:DI: Ptr to DPT (in RAMVARS segment) |
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166 | ; Returns: |
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167 | ; Nothing |
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168 | ; Corrupts registers: |
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169 | ; AL, DX |
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170 | ;-------------------------------------------------------------------- |
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171 | ALIGN JUMP_ALIGN |
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172 | StartDMAtransferForXTCFwithDmaModeInAH: |
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173 | push cx |
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174 | |
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175 | ; Program 8-bit DMA Controller |
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176 | |
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177 | ; Disable Interrupts and DMA Channel 3 during DMA setup |
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178 | cli ; Disable interrupts |
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179 | mov al, SET_CH3_MASK_BIT |
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180 | out MASK_REGISTER_DMA8_out, al ; Disable DMA Channel 3 |
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181 | |
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182 | ; Set DMA Mode (read or write using channel 3) |
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183 | mov al, ah |
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184 | out MODE_REGISTER_DMA8_out, al |
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185 | |
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186 | ; Set address to DMA controller |
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187 | out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte |
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188 | mov ax, [bp+DMAVARS.bbbPhysicalAddress] |
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189 | out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; Low byte |
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190 | mov al, ah |
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191 | out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; High byte |
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192 | mov al, [bp+DMAVARS.bbbPhysicalAddress+2] |
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193 | out PAGE_DMA8_CH_3, al |
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194 | |
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195 | ; Set number of bytes to transfer (DMA controller must be programmed number of bytes - 1) |
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196 | out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte |
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197 | mov ax, cx |
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198 | out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; Low byte |
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199 | mov al, ah |
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200 | out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; High byte |
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201 | |
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202 | ; Enable DMA Channel 3 |
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203 | mov al, CLEAR_CH3_MASK_BIT |
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204 | out MASK_REGISTER_DMA8_out, al ; Enable DMA Channel 3 |
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205 | sti ; Enable interrupts |
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206 | |
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207 | |
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208 | ; XT-CFv2 will present data in 16-byte blocks, but byte count may not |
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209 | ; be divisable by 16 due to boundary crossing. So catch any < 16-byte |
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210 | ; block by adding 15, then dividing bytes (in CX) by 16 to get the |
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211 | ; total block requests. The 8237 is programmed with the actual byte |
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212 | ; count and will end the transfer by asserting TC when done. |
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213 | add cx, BYTE 1 + 15 ; Number of BYTEs to xfer + 15 (bit 16 in CF) |
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214 | rcr cx, 1 |
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215 | eSHR_IM cx, 3 ; CX = Number of 16 byte blocks |
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216 | mov dx, [di+DPT.wBasePort] |
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217 | add dl, XTCF_CONTROL_REGISTER |
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218 | |
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219 | .MoreToDo: ; at this point, cx must be >0 |
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220 | mov al, 40h ; 0x40 = Raise DRQ and clear XT-CFv2 transfer counter |
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221 | .NextDemandBlock: |
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222 | out dx, al ; get up to 16 bytes from XT-CF card |
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223 | loop .NextDemandBlock ; decrement CX and loop if <> 0 |
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224 | ; (Loop provides a wait-state between 16-byte blocks; do not unroll) |
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225 | |
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226 | .CleanUp: |
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227 | ; check the transfer is actually done - in case another DMA operation messed things up |
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228 | inc cx ; set up CX, in case we need to do an extra iteration |
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229 | in al, STATUS_REGISTER_DMA8_in ; get DMA status register |
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230 | test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT ; test DMA ch.3 TC bit |
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231 | jz SHORT .MoreToDo ; it wasn't set so get more bytes |
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232 | |
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233 | .EndDMA: |
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234 | mov al, 10h ; |
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235 | out dx, al ; set back to DMA enabled status |
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236 | pop cx |
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237 | ret |
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238 | |
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239 | |
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240 | ;-------------------------------------------------------------------- |
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241 | ; UpdateVariablesForSecondPageIfRequired |
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242 | ; Parameters: |
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243 | ; CX: Number of BYTEs in first page - 1 |
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244 | ; SS:BP: Ptr to DMAVARS |
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245 | ; Returns: |
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246 | ; CX: Bytes left to transfer - 1 (if CF = 0) |
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247 | ; CF: 0 if second DMA transfer required |
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248 | ; 1 if one DMA transfer was enough |
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249 | ; Corrupts registers: |
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250 | ; AX, (CX) |
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251 | ;-------------------------------------------------------------------- |
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252 | ALIGN JUMP_ALIGN |
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253 | UpdateVariablesForSecondPageIfRequired: |
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254 | inc cx ; BYTEs in first page |
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255 | jcxz .FullPageXferred ; 0 = 65536 |
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256 | |
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257 | ; Store total WORDs transferred so far |
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258 | mov ax, cx |
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259 | shr ax, 1 ; BYTEs to WORDs |
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260 | mov [bp+DMAVARS.wTotalWordsXferred], ax |
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261 | |
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262 | ; Get bytes left to transfer for second DMA page |
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263 | mov ax, [bp+DMAVARS.wBytesLeftToXferLessOne] |
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264 | sub ax, cx |
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265 | jb SHORT .OnePageWasEnough |
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266 | |
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267 | ; Increment address |
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268 | add [bp+DMAVARS.bbbPhysicalAddress], cx |
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269 | adc BYTE [bp+DMAVARS.bbbPhysicalAddress+2], 0 ; Never sets CF |
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270 | xchg cx, ax |
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271 | ret |
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272 | |
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273 | .FullPageXferred: |
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274 | mov WORD [bp+DMAVARS.wTotalWordsXferred], 65536 / 2 |
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275 | stc |
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276 | .OnePageWasEnough: |
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277 | ret |
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278 | |
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279 | |
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280 | |
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281 | |
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282 | %if 0 |
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283 | ;-------------------------------------------------------------------- |
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284 | ALIGN JUMP_ALIGN |
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285 | ReadBlockFromXTCF: |
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286 | ; Parameters: |
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287 | ; CX: Block size in 512 byte sectors (1..64) |
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288 | ; DX: IDE Data port address |
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289 | ; ES:DI: Normalized ptr to buffer to receive data |
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290 | ; Returns: |
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291 | ; Nothing |
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292 | ; Corrupts registers: |
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293 | ; AX, BX, CX |
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294 | |
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295 | ; use config register to see what we're doing: |
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296 | ; < A0 = DMA via ch.3 |
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297 | ; > A0 = mem-mapped IO (word-length) |
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298 | ; |
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299 | |
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300 | or dl, 0x1f ; XT-CF board control register address (base + 1fh) |
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301 | in al, dx ; get control register |
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302 | cmp al, 0xA0 ; test al against 0xA0: |
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303 | jae .MemMapIO ; - use memory-mapped IO if >=A0h |
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304 | or al, al ; test al against 0 (quicker than cmp): |
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305 | jz .PortIO ; - use port-based IO (the default) if it was zero |
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306 | ; otherwise, 0 < al < A0h, so fall to DMA mode |
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307 | |
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308 | .DMAIO: |
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309 | ; work out how much we're transferring. We can't cross a physical 64KB boundary |
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310 | ; but since the max transfer size is 64KB, we only ever need to do one or two DMA operations |
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311 | |
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312 | ; first, normalise the pointer - we need ES to be a physical page address |
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313 | |
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314 | mov ax, es |
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315 | mov ch, cl ; max sectors is 128; also sectors << 8 = words, and we need cl... |
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316 | mov cl, 4 ; ... for the rotate parameter |
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317 | rol ax, cl ; ax = es rol 4 |
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318 | mov bx, ax ; bx = ax = es rol 4 |
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319 | and al, 0xf0 ; ax (15..4) now has es (11..0) |
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320 | and bx, 0x000f ; bx (3..0) now has es (15..12) |
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321 | add di, ax ; add offset portion of es (in ax) to di... |
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322 | adc bl, 0 ; ... and if it overflowed, increment bl |
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323 | mov es, bx ; es now has physical segment address >> 12 |
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324 | |
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325 | ; now check how much we can transfer without crossing a physical page boundary |
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326 | mov bx, di ; |
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327 | not bx ; 65535 - di = number of bytes we could transfer -1 now in bx |
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328 | xor cl, cl ; zero cl; cx now has transfer size in words |
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329 | shl cx, 1 ; words to bytes; CX has total byte count |
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330 | dec cx ; calling DMA with 0 implies 1 byte transferred (so max is 64k exactly) |
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331 | cmp bx, cx ; can we do it in one hit? |
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332 | jae .LastDMA |
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333 | |
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334 | ; at this point, the (bytes-1) for this transfer are in bx, total byte count -1 in cx |
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335 | ; and we need to do 2 DMA operations as the buffer straddles a physical 64k boundary |
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336 | |
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337 | sub cx, bx ; cx has bytes for 2nd transfer (as (x-1)-(y-1) = x-y) |
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338 | dec cx ; cx has bytes-1 for 2nd transfer |
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339 | xchg bx, cx ; bx = bytes-1 for 2nd transfer; cx = bytes-1 for this transfer |
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340 | mov ah, 0x07 ; request a read DMA transfer |
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341 | call DemandBasedTransferWithBytesInCX |
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342 | |
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343 | ; DMA 1 of 2 done - set up registers for second transfer |
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344 | mov cx, bx ; bytes-1 for the 2nd transfer back in cx |
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345 | ; 1st transfer is done, now for the second |
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346 | ALIGN JUMP_ALIGN |
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347 | .LastDMA: |
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348 | ; at this point, (bytes-1) for this transfer are in CX |
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349 | mov ah, 0x07 ; request a read DMA transfer |
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350 | call DemandBasedTransferWithBytesInCX |
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351 | |
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352 | ; transfer is done, set ES back to a physical segment address |
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353 | mov ax, es ; |
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354 | mov cl, 4 ; |
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355 | ror ax, cl ; ax = es ror 4. Since ES was >> 12 (for DMA controller) so |
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356 | mov es, ax ; now it's back to normal format |
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357 | |
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358 | ; pointer format restored - we're done |
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359 | and dl, 0xE0 ; restore register values |
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360 | ret |
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361 | |
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362 | |
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363 | ;-------------------------------------------------------------------- |
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364 | ALIGN JUMP_ALIGN |
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365 | WriteBlockToXTCF: |
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366 | ; use config register to see what we're doing: |
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367 | ; 0 = not set; use byte-length port-IO |
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368 | ; < A0 = DMA via ch.3 |
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369 | ; > A0 = mem-mapped IO (word-length) |
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370 | ; |
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371 | |
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372 | or dl, 0x1f ; XT-CF board control register address (base + 1fh) |
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373 | in al, dx ; get control register |
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374 | cmp al, 0xA0 ; test al against 0xA0: |
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375 | jae .MemMapIO ; - use memory-mapped IO if >=A0h |
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376 | or al, al ; test al against 0 (quicker than cmp): |
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377 | jz .PortIO ; - use port-based IO (the default) if it was zero |
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378 | ; otherwise, 0 < al < A0h, so fall to DMA mode |
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379 | |
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380 | .DMAIO: |
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381 | ; work out how much we're transferring. We can't cross a physical 64KB boundary |
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382 | ; but since the max transfer size is 64KB, we only ever need to do one or two DMA operations |
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383 | |
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384 | push di ; save di... |
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385 | mov di, si ; ...and move si to di (for DMA routine) |
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386 | |
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387 | ; first, normalise the pointer - we need ES to be a physical page address |
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388 | |
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389 | mov ax, es |
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390 | mov ch, cl ; max sectors is 64; also sectors << 8 = words, and we need cl... |
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391 | mov cl, 4 ; ... for the rotate parameter |
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392 | rol ax, cl ; ax = es rol 4 |
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393 | mov bx, ax ; bx = ax = es rol 4 |
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394 | and al, 0xf0 ; ax (15..4) now has es (11..0) |
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395 | and bx, 0x000f ; bx (3..0) now has es (15..12) |
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396 | add di, ax ; add offset portion of es (in ax) to si... |
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397 | adc bl, 0 ; ... and if it overflowed, increment bl |
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398 | mov es, bx ; es now has physical segment address >> 12 |
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399 | |
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400 | ; now check how much we can transfer without crossing a physical page boundary |
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401 | mov bx, di ; |
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402 | not bx ; 65535 - di = number of bytes we could transfer -1 now in bx |
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403 | xor cl, cl ; zero cl; cx now has transfer size in words |
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404 | shl cx, 1 ; words to bytes; CX has total byte count |
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405 | dec cx ; calling DMA with 0 implies 1 byte transferred (so max is 64k exactly) |
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406 | cmp bx, cx ; can we do it in one hit? |
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407 | jae .LastDMA |
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408 | |
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409 | ; at this point, the (bytes-1) for this transfer are in bx, total byte count -1 in cx |
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410 | ; and we need to do 2 DMA operations as the buffer straddles a physical 64k boundary |
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411 | |
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412 | sub cx, bx ; cx has bytes for 2nd transfer (as (x-1)-(y-1) = x-y) |
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413 | dec cx ; cx has bytes-1 for 2nd transfer |
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414 | xchg bx, cx ; bx = bytes-1 for 2nd transfer; cx = bytes-1 for this transfer |
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415 | mov ah, 0x0b ; request a write DMA transfer |
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416 | call DemandBasedTransferWithBytesInCX |
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417 | |
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418 | ; DMA 1 of 2 done - set up registers for second transfer |
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419 | mov cx, bx ; bytes-1 for the 2nd transfer back in cx |
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420 | ; 1st transfer is done, now for the second |
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421 | ALIGN JUMP_ALIGN |
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422 | .LastDMA: |
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423 | ; at this point, (bytes-1) for this transfer are in CX |
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424 | mov ah, 0x0b ; request a write DMA transfer |
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425 | call DemandBasedTransferWithBytesInCX |
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426 | |
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427 | ; transfer is done, set ES back to a physical segment address |
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428 | mov ax, es ; |
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429 | mov cl, 4 ; |
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430 | ror ax, cl ; ax = es ror 4. Since ES was >> 12 (for DMA controller) so |
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431 | mov es, ax ; now it's back to normal format |
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432 | |
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433 | mov si, di ; move di (used by DMA routine) back to si |
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434 | |
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435 | ; pointers updated - we're done |
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436 | pop di ; |
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437 | and dl, 0xE0 ; restore register values |
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438 | ret |
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439 | |
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440 | |
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441 | ; ------------------------------------------------------------------------------------------------------------- |
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442 | ; |
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443 | ; DemandBasedTransferWithBytesInCX |
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444 | ; ================================ |
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445 | ; |
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446 | ; DMA Transfer function: |
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447 | ; - AH = 0x07 for read from media - demand/inc/non-auto-init/write(to memory)/ch3 |
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448 | ; - AH = 0x0b for write to media - demand/inc/non-auto-init/read(from memory)/ch3 |
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449 | ; - byte count -1 in CX |
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450 | ; - XT-CF control register in DX |
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451 | ; - physical segment address in ES *but* high four bits in low four bits (i.e. shr 12) |
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452 | ; - buffer offset (from physical segment) in DI |
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453 | ; |
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454 | ; Note - cannot cross a physical segment boundary, but ES will be updated (maintaining the >>12 |
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455 | ; format) if after the last byte has been transferred the pointer needs to be updated to |
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456 | ; the next physical segment. |
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457 | ; |
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458 | ; Preserves: BX, DX |
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459 | ; Corrupts: AX, CX |
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460 | ; Updates: ES, DI |
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461 | ; |
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462 | ; ------------------------------------------------------------------------------------------------------------- |
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463 | |
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464 | ALIGN JUMP_ALIGN |
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465 | DemandBasedTransferWithBytesInCX: |
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466 | cli ; clear interrupts while we set up the actual DMA transfer |
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467 | mov al, 0x07 ; mask (4) + channel (3) |
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468 | out 0x0a, al ; send to DMA mask register |
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469 | mov al, ah ; retrieve the transfer mode passed in... |
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470 | out 0x0b, al ; and send mode to DMA mode register |
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471 | out 0x0c, al ; clear DMA byte-order flip-flop (write any value) |
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472 | mov ax, di ; di has buffer offset |
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473 | out 0x06, al ; |
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474 | mov al, ah ; |
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475 | out 0x06, al ; send offset to DMA controller address port for ch.3 |
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476 | mov ax, es ; es has physical segment address >> 12 |
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477 | out 0x82, al ; send the relavent 4-bits to DMA controller page for ch.3 |
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478 | out 0x0c, al ; clear DMA byte-order flip-flop (write any value) |
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479 | mov ax, cx ; byte count to AX |
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480 | out 0x07, al ; send low-byte of transfer size in bytes... |
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481 | mov al, ah ; mov high byte to low byte... |
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482 | out 0x07, al ; ...and high byte to DMA controller count port for ch.3 |
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483 | mov al, 0x03 ; clear bit mask (0) + channel (3) |
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484 | out 0x0a, al ; send to DMA mask register - enable the DMA! |
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485 | sti ; enable interrutps; let the CPU see to anything outstanding |
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486 | |
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487 | mov ax, es ; update ES:DI (values have been loaded into DMA controller) |
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488 | inc cx ; CX back to actual bytes |
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489 | add di, cx ; add bytes to DI... |
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490 | adc ax, 0 ; ...and if it overflowed, increment... |
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491 | mov es, ax ; ...ES |
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492 | |
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493 | add cx, 15 ; XT-CFv2 will present data in 16-byte blocks, but byte count may not |
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494 | shr cx, 1 ; be divisable by 16 due to boundary crossing. So catch any < 16-byte |
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495 | shr cx, 1 ; block by adding 15, then dividing bytes (in CX) by 16 to get the |
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496 | shr cx, 1 ; total block requests. The 8237 is programmed with the actual byte |
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497 | shr cx, 1 ; count and will end the transfer by asserting TC when done. |
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498 | |
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499 | .MoreToDo: ; at this point, cx must be >0 |
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500 | mov al, 0x40 ; 0x40 = Raise DRQ and clear XT-CFv2 transfer counter |
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501 | .NextDemandBlock: |
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502 | out dx, al ; get up to 16 bytes from XT-CF card |
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503 | loop .NextDemandBlock ; decrement CX and loop if <> 0 |
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504 | ; (Loop provides a wait-state between 16-byte blocks; do not unroll) |
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505 | .CleanUp: |
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506 | ; check the transfer is actually done - in case another DMA operation messed things up |
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507 | inc cx ; set up CX, in case we need to do an extra iteration |
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508 | in al, 0x08 ; get DMA status register |
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509 | and al, 0x08 ; test DMA ch.3 TC bit |
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510 | jz .MoreToDo ; it wasn't set so get more bytes |
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511 | .EndDMA: |
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512 | mov al, 0x10 ; |
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513 | out dx, al ; set back to DMA enabled status |
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514 | ret |
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515 | |
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516 | %endif ; 0 |
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517 | |
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518 | |
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519 | |
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