1 | ; Project name : XTIDE Universal BIOS
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2 | ; Description : IDE Read/Write functions for transferring
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3 | ; block using DMA.
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4 | ; These functions should only be called from IdeTransfer.asm.
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5 |
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6 | ;
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7 | ; XTIDE Universal BIOS and Associated Tools
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8 | ; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
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9 | ;
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10 | ; This program is free software; you can redistribute it and/or modify
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11 | ; it under the terms of the GNU General Public License as published by
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12 | ; the Free Software Foundation; either version 2 of the License, or
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13 | ; (at your option) any later version.
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14 | ;
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15 | ; This program is distributed in the hope that it will be useful,
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16 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of
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17 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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18 | ; GNU General Public License for more details.
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19 | ; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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20 | ;
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21 |
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22 |
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23 | ; Section containing code
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24 | SECTION .text
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25 |
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26 | ;--------------------------------------------------------------------
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27 | ; IdeDmaBlock_WriteToXTCF
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28 | ; Parameters:
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29 | ; CX: Block size in 512 byte sectors
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30 | ; DX: XTCF Base Port Address
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31 | ; ES:SI: Physical address to buffer to receive data
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32 | ; Returns:
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33 | ; Nothing
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34 | ; Corrupts registers:
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35 | ; AX, BX, CX, DX
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36 | ;--------------------------------------------------------------------
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37 | ALIGN JUMP_ALIGN
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38 | IdeDmaBlock_WriteToXTCF:
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39 | xchg si, di
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40 | mov bl, CHANNEL_3 | READ | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE
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41 | call TransferBlockToOrFromXTCF
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42 | xchg di, si
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43 | ret
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44 |
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45 |
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46 | ;--------------------------------------------------------------------
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47 | ; IdeDmaBlock_ReadFromXTCF
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48 | ; Parameters:
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49 | ; CX: Block size in 512 byte sectors
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50 | ; DX: XTCF Base Port Address
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51 | ; ES:DI: Physical address to buffer to receive data
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52 | ; Returns:
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53 | ; Nothing
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54 | ; Corrupts registers:
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55 | ; AX, BX, CX, DX
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56 | ;--------------------------------------------------------------------
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57 | ALIGN JUMP_ALIGN
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58 | IdeDmaBlock_ReadFromXTCF:
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59 | mov bl, CHANNEL_3 | WRITE | AUTOINIT_DISABLE | ADDRESS_INCREMENT | DEMAND_MODE
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60 | ; Fall to TransferBlockToOrFromXTCF
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61 |
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62 |
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63 | ;--------------------------------------------------------------------
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64 | ; TransferBlockToOrFromXTCF
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65 | ; Parameters:
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66 | ; BL: Mode byte for DMA Mode Register
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67 | ; CX: Block size in 512 byte sectors
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68 | ; DX: XTCF Base Port Address
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69 | ; ES:DI: Physical address to buffer to receive data
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70 | ; Returns:
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71 | ; Nothing
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72 | ; Corrupts registers:
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73 | ; AX, BX, CX, DX
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74 | ;--------------------------------------------------------------------
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75 | TransferBlockToOrFromXTCF:
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76 | ; 8-bit DMA transfers must be done withing 64k physical page.
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77 | ; We support maximum of 128 sectors (65536 bytes) per one INT 13h call
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78 | ; so we might need to separate transfer to 2 separate DMA operations.
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79 |
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80 | ; Load XT-CF Control Register port to DX
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81 | add dl, XTCF_CONTROL_REGISTER
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82 |
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83 | ; Calculate bytes for first page
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84 | mov ax, di
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85 | neg ax ; AX = Max BYTEs for first page
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86 | %ifdef USE_186
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87 | shl cx, 9 ; CX = Block size in BYTEs
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88 | %else
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89 | xchg cl, ch
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90 | shl cx, 1
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91 | %endif
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92 | cmp cx, ax
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93 | jbe SHORT .TransferLastDmaPageWithSizeInCX
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94 |
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95 | ; Push size for second DMA page
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96 | xchg cx, ax ; CX = BYTEs for first page
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97 | sub ax, cx ; AX = BYTEs for second page
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98 | push ax
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99 |
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100 | ; Transfer first DMA page
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101 | call StartDMAtransferForXTCFwithDmaModeInBL
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102 | pop cx ; Pop size for second DMA page
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103 |
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104 | .TransferLastDmaPageWithSizeInCX:
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105 | ; Fall to StartDMAtransferForXTCFwithDmaModeInBL
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106 |
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107 |
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108 | ;--------------------------------------------------------------------
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109 | ; StartDMAtransferForXTCFwithDmaModeInBL
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110 | ; Parameters:
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111 | ; CX: Number of BYTEs to transfer
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112 | ; BL: Byte for DMA Mode Register
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113 | ; DX: XTCF Control Register
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114 | ; Returns:
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115 | ; Nothing
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116 | ; Corrupts registers:
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117 | ; AX
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118 | ;--------------------------------------------------------------------
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119 | ALIGN JUMP_ALIGN
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120 | StartDMAtransferForXTCFwithDmaModeInBL:
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121 | ; Program 8-bit DMA Controller
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122 | ; Disable Interrupts and DMA Channel 3 during DMA setup
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123 | mov al, SET_CH3_MASK_BIT
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124 | cli ; Disable interrupts
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125 | out MASK_REGISTER_DMA8_out, al ; Disable DMA Channel 3
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126 |
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127 | ; Set DMA Mode (read or write using channel 3)
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128 | mov al, bl
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129 | out MODE_REGISTER_DMA8_out, al
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130 |
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131 | ; Set address to DMA controller
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132 | out CLEAR_FLIPFLOP_DMA8_out, al ; Reset flip-flop to low byte
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133 | mov ax, es
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134 | out PAGE_DMA8_CH_3, al
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135 | mov ax, di
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136 | out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; Low byte
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137 | mov al, ah
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138 | out BASE_AND_CURRENT_ADDRESS_REGISTER_DMA8_CH3_out, al ; High byte
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139 |
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140 | ; Set number of bytes to transfer (DMA controller must be programmed number of bytes - 1)
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141 | mov ax, cx
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142 | dec ax ; DMA controller is programmed for one byte less
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143 | out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; Low byte
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144 | mov al, ah
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145 | out BASE_AND_CURRENT_COUNT_REGISTER_DMA8_CH3_out, al ; High byte
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146 |
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147 | ; Enable DMA Channel 3
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148 | mov al, CLEAR_CH3_MASK_BIT
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149 | out MASK_REGISTER_DMA8_out, al ; Enable DMA Channel 3
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150 | sti ; Enable interrupts
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151 |
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152 |
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153 | ; XT-CF transfers 16 bytes at a time. We need to manually
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154 | ; start transfer for every block.
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155 | ALIGN JUMP_ALIGN
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156 | .TransferNextBlock:
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157 | mov al, RAISE_DRQ_AND_CLEAR_XTCF_XFER_COUNTER
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158 | cli ; We want no ISR to read DMA Status Register before we do
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159 | out dx, al ; Transfer up to 16 bytes to/from XT-CF card
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160 | ; * Here XT-CF sets CPU to wait states during transfer *
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161 | in al, STATUS_REGISTER_DMA8_in
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162 | sti
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163 | test al, FLG_CH3_HAS_REACHED_TERMINAL_COUNT
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164 | jz SHORT .TransferNextBlock ; All bytes transferred?
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165 |
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166 | ; Restore XT-CF to normal operation
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167 | mov al, XTCF_DMA_MODE
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168 | out dx, al
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169 |
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170 | ; Increment physical address in ES:DI
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171 | mov ax, es
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172 | add di, cx
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173 | adc al, ah
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174 | mov es, ax
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175 | ret
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