source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm@ 578

Last change on this file since 578 was 545, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Integrated XT-CFv3 support by James Pearce.
  • XT-CFv2 memory mapped I/O and DMA modes are no longer supported (but PIO mode is).
File size: 8.7 KB
RevLine 
[150]1; Project name : XTIDE Universal BIOS
2; Description : IDE Device Command functions.
3
[376]4;
[445]5; XTIDE Universal BIOS and Associated Tools
[526]6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2013 by XTIDE Universal BIOS Team.
[376]7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
[445]12;
[376]13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
[445]17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
[376]19
[150]20; Section containing code
21SECTION .text
22
23;--------------------------------------------------------------------
[507]24; IdeCommand_ResetMasterAndSlaveController
25; Parameters:
26; DS:DI: Ptr to DPT (in RAMVARS segment)
27; Returns:
28; AH: INT 13h Error Code
29; CF: Cleared if success, Set if error
30; Corrupts registers:
31; AL, BX, CX, DX
32;--------------------------------------------------------------------
33IdeCommand_ResetMasterAndSlaveController:
34 ; HSR0: Set_SRST
35 call AccessDPT_GetDeviceControlByteToAL
36 or al, FLG_DEVCONTROL_SRST | FLG_DEVCONTROL_nIEN ; Set Reset bit
37 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out
38 mov ax, HSR0_RESET_WAIT_US
39 call Timer_DelayMicrosecondsFromAX
40
41 ; HSR1: Clear_wait
42 call AccessDPT_GetDeviceControlByteToAL
43 or al, FLG_DEVCONTROL_nIEN
44 and al, ~FLG_DEVCONTROL_SRST ; Clear reset bit
45 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out
46 mov ax, HSR1_RESET_WAIT_US
47 call Timer_DelayMicrosecondsFromAX
48
49 ; HSR2: Check_status
50 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MAXIMUM, FLG_STATUS_BSY)
51 jmp IdeWait_PollStatusFlagInBLwithTimeoutInBH
52
53
54;--------------------------------------------------------------------
[150]55; IdeCommand_IdentifyDeviceToBufferInESSIwithDriveSelectByteInBH
56; Parameters:
57; BH: Drive Select byte for Drive and Head Select Register
[473]58; DX: Autodetected port for XT-CF
[150]59; DS: Segment to RAMVARS
60; ES:SI: Ptr to buffer to receive 512-byte IDE Information
61; CS:BP: Ptr to IDEVARS
62; Returns:
63; AH: INT 13h Error Code
64; CF: Cleared if success, Set if error
65; Corrupts registers:
[443]66; AL, BX, CX, DX, SI, DI, ES
[150]67;--------------------------------------------------------------------
[400]68IdeCommand_IdentifyDeviceToBufferInESSIwithDriveSelectByteInBH:
[150]69 ; Create fake DPT to be able to use Device.asm functions
70 call FindDPT_ForNewDriveToDSDI
[158]71 eMOVZX ax, bh
[150]72 mov [di+DPT.wFlags], ax
[473]73 call CreateDPT_StoreIdevarsOffsetAndBasePortFromCSBPtoDPTinDSDI
74 call IdeDPT_StoreDeviceTypeToDPTinDSDIfromIdevarsInCSBP
[365]75 mov BYTE [di+DPT_ATA.bBlockSize], 1 ; Block = 1 sector
[150]76
[443]77 ; Wait until drive motors have reached full speed
[473]78 cmp bp, BYTE ROMVARS.ideVars0 ; First controller?
[150]79 jne SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster
[473]80 test bh, FLG_DRVNHEAD_DRV ; Wait already done for Master
[150]81 jnz SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster
[545]82 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MOTOR_STARTUP, FLG_STATUS_BSY)
[507]83 call IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]84.SkipLongWaitSinceDriveIsNotPrimaryMaster:
85
86 ; Create IDEPACK without INTPACK
87 push bp
88 call Idepack_FakeToSSBP
89
[545]90%ifdef MODULE_8BIT_IDE
[480]91 ; Enable 8-bit PIO mode for 8-bit ATA and XT-CF
92 push si
93 call AH9h_Enable8bitModeForDevice8bitAta
[545]94%ifdef MODULE_8BIT_IDE_ADVANCED
95 mov al, XTCF_8BIT_PIO_MODE ; initialise with most basic transfer mode
[480]96 call AH9h_SetModeFromALtoXTCF
[545]97%endif ; MODULE_8BIT_IDE_ADVANCED
[443]98 pop si
[545]99%endif ; MODULE_8BIT_IDE
[437]100
[150]101 ; Prepare to output Identify Device command
102 mov dl, 1 ; Sector count (required by IdeTransfer.asm)
103 mov al, COMMAND_IDENTIFY_DEVICE
[411]104 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_DRQ)
[150]105 call Idepack_StoreNonExtParametersAndIssueCommandFromAL
106
107 ; Clean stack and return
[439]108.FailedToSet8bitMode:
[443]109 lea sp, [bp+SIZE_OF_IDEPACK_WITHOUT_INTPACK] ; This assumes BP hasn't changed between Idepack_FakeToSSBP and here
[150]110 pop bp
111 ret
112
113
114;--------------------------------------------------------------------
115; IdeCommand_OutputWithParameters
116; Parameters:
117; BH: System timer ticks for timeout
118; BL: IDE Status Register bit to poll after command
119; ES:SI: Ptr to buffer (for data transfer commands)
120; DS:DI: Ptr to DPT (in RAMVARS segment)
121; SS:BP: Ptr to IDEPACK
122; Returns:
123; AH: INT 13h Error Code
[249]124; CX: Number of successfully transferred sectors (for transfer commands)
[150]125; CF: Cleared if success, Set if error
126; Corrupts registers:
[249]127; AL, BX, (CX), DX, (ES:SI for data transfer commands)
[150]128;--------------------------------------------------------------------
129ALIGN JUMP_ALIGN
[400]130IdeCommand_OutputWithParameters:
[158]131 push bx ; Store status register bits to poll
[150]132
133 ; Select Master or Slave drive and output head number or LBA28 top bits
[400]134 call IdeCommand_SelectDrive
[150]135 jc SHORT .DriveNotReady
136
137 ; Output Device Control Byte to enable or disable interrupts
138 mov al, [bp+IDEPACK.bDeviceControl]
[400]139%ifdef MODULE_IRQ
[158]140 test al, FLG_DEVCONTROL_nIEN ; Interrupts disabled?
[152]141 jnz SHORT .DoNotSetInterruptInServiceFlag
[158]142
143 ; Clear Task Flag and set Interrupt In-Service Flag
[152]144 push ds
[540]145 LOAD_BDA_SEGMENT_TO ds, dx
146 mov BYTE [BDA.bHDTaskFlg], 1 ; Will be adjusted to zero later
[152]147 pop ds
148.DoNotSetInterruptInServiceFlag:
[266]149%endif
[267]150 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out
[150]151
152 ; Output Feature Number
153 mov al, [bp+IDEPACK.bFeatures]
[267]154 OUTPUT_AL_TO_IDE_REGISTER FEATURES_REGISTER_out
[150]155
156 ; Output Sector Address High (only used by LBA48)
[285]157%ifdef MODULE_EBIOS
[294]158 eMOVZX ax, [bp+IDEPACK.bLbaLowExt] ; Zero sector count
[150]159 mov cx, [bp+IDEPACK.wLbaMiddleAndHighExt]
[400]160 call OutputSectorCountAndAddress
[285]161%endif
[150]162
163 ; Output Sector Address Low
164 mov ax, [bp+IDEPACK.wSectorCountAndLbaLow]
165 mov cx, [bp+IDEPACK.wLbaMiddleAndHigh]
[400]166 call OutputSectorCountAndAddress
[150]167
168 ; Output command
169 mov al, [bp+IDEPACK.bCommand]
[267]170 OUTPUT_AL_TO_IDE_REGISTER COMMAND_REGISTER_out
[150]171
172 ; Wait until command completed
[400]173 pop bx ; Pop status and timeout for polling
174 cmp bl, FLG_STATUS_DRQ ; Data transfer started?
175 jne SHORT .WaitUntilNonTransferCommandCompletes
[493]176%ifdef MODULE_8BIT_IDE_ADVANCED
[545]177 cmp BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_JRIDE_ISA
178 jae SHORT JrIdeTransfer_StartWithCommandInAL ; DEVICE_8BIT_JRIDE_ISA or DEVICE_8BIT_ADP50L
[480]179%endif
[474]180 jmp IdeTransfer_StartWithCommandInAL
[400]181
182.WaitUntilNonTransferCommandCompletes:
183%ifdef MODULE_IRQ
[150]184 test BYTE [bp+IDEPACK.bDeviceControl], FLG_DEVCONTROL_nIEN
[400]185 jz SHORT .PollStatusFlagInsteadOfWaitIrq
186 jmp IdeWait_IRQorStatusFlagInBLwithTimeoutInBH
187.PollStatusFlagInsteadOfWaitIrq:
188%endif
189 jmp IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]190
191.DriveNotReady:
192 pop bx ; Clean stack
193 ret
194
195
196;--------------------------------------------------------------------
197; IdeCommand_SelectDrive
198; Parameters:
199; DS:DI: Ptr to DPT (in RAMVARS segment)
200; SS:BP: Ptr to IDEPACK
201; Returns:
202; AH: INT 13h Error Code
203; CF: Cleared if success, Set if error
204; Corrupts registers:
205; AL, BX, CX, DX
206;--------------------------------------------------------------------
207ALIGN JUMP_ALIGN
[400]208IdeCommand_SelectDrive:
[444]209 ; We use different timeout value when detecting drives.
210 ; This prevents unnecessary long delays when drive is not present.
[473]211 mov cx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRDY, FLG_STATUS_DRDY)
[444]212 cmp WORD [RAMVARS.wDrvDetectSignature], RAMVARS_DRV_DETECT_SIGNATURE
[473]213 eCMOVE ch, TIMEOUT_SELECT_DRIVE_DURING_DRIVE_DETECTION
[408]214
[150]215 ; Select Master or Slave Drive
216 mov al, [bp+IDEPACK.bDrvAndHead]
[267]217 OUTPUT_AL_TO_IDE_REGISTER DRIVE_AND_HEAD_SELECT_REGISTER
[473]218 mov bx, cx
[400]219 call IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]220
[281]221 ; Ignore errors from IDE Error Register (set by previous command)
[285]222 cmp ah, RET_HD_TIMEOUT
223 je SHORT .FailedToSelectDrive
224 xor ax, ax ; Always success unless timeout
225 ret
226.FailedToSelectDrive:
[281]227 stc
[279]228 ret
[150]229
[279]230
[150]231;--------------------------------------------------------------------
232; OutputSectorCountAndAddress
233; Parameters:
234; AH: LBA low bits (Sector Number)
235; AL: Sector Count
236; CL: LBA middle bits (Cylinder Number low)
237; CH: LBA high bits (Cylinder Number high)
238; DS:DI: Ptr to DPT (in RAMVARS segment)
239; Returns:
240; Nothing
241; Corrupts registers:
242; AL, BX, DX
243;--------------------------------------------------------------------
244ALIGN JUMP_ALIGN
[400]245OutputSectorCountAndAddress:
[267]246 OUTPUT_AL_TO_IDE_REGISTER SECTOR_COUNT_REGISTER
[150]247
248 mov al, ah
[267]249 OUTPUT_AL_TO_IDE_REGISTER LBA_LOW_REGISTER
[150]250
251 mov al, cl
[267]252 OUTPUT_AL_TO_IDE_REGISTER LBA_MIDDLE_REGISTER
[150]253
254 mov al, ch
[473]255 OUTPUT_AL_TO_IDE_REGISTER LBA_HIGH_REGISTER
256 ret
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