source: xtideuniversalbios/trunk/XTIDE_Universal_BIOS/Src/Device/IDE/IdeCommand.asm@ 479

Last change on this file since 479 was 474, checked in by aitotat@…, 12 years ago

Changes to XTIDE Universal BIOS:

  • Drive detection now displays autodetected XT-CF port and skips slave drives for XT-CF.
  • AH=1Eh no longer tries to disable 8-bit mode for memory mapped and DMA transfer modes.
  • Preparations to implement DMA.
File size: 8.9 KB
RevLine 
[150]1; Project name : XTIDE Universal BIOS
2; Description : IDE Device Command functions.
3
[376]4;
[445]5; XTIDE Universal BIOS and Associated Tools
[376]6; Copyright (C) 2009-2010 by Tomi Tilli, 2011-2012 by XTIDE Universal BIOS Team.
7;
8; This program is free software; you can redistribute it and/or modify
9; it under the terms of the GNU General Public License as published by
10; the Free Software Foundation; either version 2 of the License, or
11; (at your option) any later version.
[445]12;
[376]13; This program is distributed in the hope that it will be useful,
14; but WITHOUT ANY WARRANTY; without even the implied warranty of
15; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16; GNU General Public License for more details.
[445]17; Visit http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
18;
[376]19
[150]20; Section containing code
21SECTION .text
22
23;--------------------------------------------------------------------
24; IdeCommand_ResetMasterAndSlaveController
25; Parameters:
26; DS:DI: Ptr to DPT (in RAMVARS segment)
27; Returns:
28; AH: INT 13h Error Code
29; CF: Cleared if success, Set if error
30; Corrupts registers:
31; AL, BX, CX, DX
32;--------------------------------------------------------------------
[400]33IdeCommand_ResetMasterAndSlaveController:
[150]34 ; HSR0: Set_SRST
35 call AccessDPT_GetDeviceControlByteToAL
36 or al, FLG_DEVCONTROL_SRST | FLG_DEVCONTROL_nIEN ; Set Reset bit
[267]37 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out
[150]38 mov ax, HSR0_RESET_WAIT_US
[155]39 call Timer_DelayMicrosecondsFromAX
[150]40
41 ; HSR1: Clear_wait
42 call AccessDPT_GetDeviceControlByteToAL
43 or al, FLG_DEVCONTROL_nIEN
44 and al, ~FLG_DEVCONTROL_SRST ; Clear reset bit
[267]45 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out
[150]46 mov ax, HSR1_RESET_WAIT_US
[155]47 call Timer_DelayMicrosecondsFromAX
[150]48
49 ; HSR2: Check_status
[432]50 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_MAXIMUM, FLG_STATUS_BSY)
[400]51 jmp IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]52
53
54;--------------------------------------------------------------------
55; IdeCommand_IdentifyDeviceToBufferInESSIwithDriveSelectByteInBH
56; Parameters:
57; BH: Drive Select byte for Drive and Head Select Register
[473]58; DX: Autodetected port for XT-CF
[150]59; DS: Segment to RAMVARS
60; ES:SI: Ptr to buffer to receive 512-byte IDE Information
61; CS:BP: Ptr to IDEVARS
62; Returns:
63; AH: INT 13h Error Code
64; CF: Cleared if success, Set if error
65; Corrupts registers:
[443]66; AL, BX, CX, DX, SI, DI, ES
[150]67;--------------------------------------------------------------------
[400]68IdeCommand_IdentifyDeviceToBufferInESSIwithDriveSelectByteInBH:
[150]69 ; Create fake DPT to be able to use Device.asm functions
70 call FindDPT_ForNewDriveToDSDI
[158]71 eMOVZX ax, bh
[150]72 mov [di+DPT.wFlags], ax
[473]73 call CreateDPT_StoreIdevarsOffsetAndBasePortFromCSBPtoDPTinDSDI
74 call IdeDPT_StoreDeviceTypeToDPTinDSDIfromIdevarsInCSBP
[365]75 mov BYTE [di+DPT_ATA.bBlockSize], 1 ; Block = 1 sector
[150]76
[443]77 ; Wait until drive motors have reached full speed
[473]78 cmp bp, BYTE ROMVARS.ideVars0 ; First controller?
[150]79 jne SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster
[473]80 test bh, FLG_DRVNHEAD_DRV ; Wait already done for Master
[150]81 jnz SHORT .SkipLongWaitSinceDriveIsNotPrimaryMaster
[445]82 call AHDh_WaitUntilDriveMotorHasReachedFullSpeed
[150]83.SkipLongWaitSinceDriveIsNotPrimaryMaster:
84
85 ; Create IDEPACK without INTPACK
86 push bp
87 call Idepack_FakeToSSBP
88
[439]89%ifdef MODULE_8BIT_IDE
[473]90 ; We set XT-CF to 8-bit PIO mode for Identify Device command.
91 ; Correct XT-CF mode is later set on AH=09h (after all drives are detected).
92 call AccessDPT_IsThisDeviceXTCF
93 jne SHORT .SkipXTCFmodeChange
94
95 xor al, al ; XTCF_8BIT_PIO_MODE
[443]96 push si
[473]97 call AH1Eh_ChangeXTCFmodeBasedOnControlRegisterInAL
[443]98 pop si
[439]99 jc SHORT .FailedToSet8bitMode
[473]100.SkipXTCFmodeChange:
101%endif ; MODULE_8BIT_IDE
[437]102
[150]103 ; Prepare to output Identify Device command
104 mov dl, 1 ; Sector count (required by IdeTransfer.asm)
105 mov al, COMMAND_IDENTIFY_DEVICE
[411]106 mov bx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRQ, FLG_STATUS_DRQ)
[150]107 call Idepack_StoreNonExtParametersAndIssueCommandFromAL
108
109 ; Clean stack and return
[439]110.FailedToSet8bitMode:
[443]111 lea sp, [bp+SIZE_OF_IDEPACK_WITHOUT_INTPACK] ; This assumes BP hasn't changed between Idepack_FakeToSSBP and here
[150]112 pop bp
113 ret
114
115
116;--------------------------------------------------------------------
117; IdeCommand_OutputWithParameters
118; Parameters:
119; BH: System timer ticks for timeout
120; BL: IDE Status Register bit to poll after command
121; ES:SI: Ptr to buffer (for data transfer commands)
122; DS:DI: Ptr to DPT (in RAMVARS segment)
123; SS:BP: Ptr to IDEPACK
124; Returns:
125; AH: INT 13h Error Code
[249]126; CX: Number of successfully transferred sectors (for transfer commands)
[150]127; CF: Cleared if success, Set if error
128; Corrupts registers:
[249]129; AL, BX, (CX), DX, (ES:SI for data transfer commands)
[150]130;--------------------------------------------------------------------
131ALIGN JUMP_ALIGN
[400]132IdeCommand_OutputWithParameters:
[158]133 push bx ; Store status register bits to poll
[150]134
135 ; Select Master or Slave drive and output head number or LBA28 top bits
[400]136 call IdeCommand_SelectDrive
[150]137 jc SHORT .DriveNotReady
138
139 ; Output Device Control Byte to enable or disable interrupts
140 mov al, [bp+IDEPACK.bDeviceControl]
[400]141%ifdef MODULE_IRQ
[158]142 test al, FLG_DEVCONTROL_nIEN ; Interrupts disabled?
[152]143 jnz SHORT .DoNotSetInterruptInServiceFlag
[158]144
145 ; Clear Task Flag and set Interrupt In-Service Flag
146 or BYTE [di+DPT.bFlagsHigh], FLGH_DPT_INTERRUPT_IN_SERVICE
[152]147 push ds
[158]148 LOAD_BDA_SEGMENT_TO ds, dx, ! ; Also zero DX
149 mov [BDA.bHDTaskFlg], dl
[152]150 pop ds
151.DoNotSetInterruptInServiceFlag:
[266]152%endif
[267]153 OUTPUT_AL_TO_IDE_CONTROL_BLOCK_REGISTER DEVICE_CONTROL_REGISTER_out
[150]154
155 ; Output Feature Number
156 mov al, [bp+IDEPACK.bFeatures]
[267]157 OUTPUT_AL_TO_IDE_REGISTER FEATURES_REGISTER_out
[150]158
159 ; Output Sector Address High (only used by LBA48)
[285]160%ifdef MODULE_EBIOS
[294]161 eMOVZX ax, [bp+IDEPACK.bLbaLowExt] ; Zero sector count
[150]162 mov cx, [bp+IDEPACK.wLbaMiddleAndHighExt]
[400]163 call OutputSectorCountAndAddress
[285]164%endif
[150]165
166 ; Output Sector Address Low
167 mov ax, [bp+IDEPACK.wSectorCountAndLbaLow]
168 mov cx, [bp+IDEPACK.wLbaMiddleAndHigh]
[400]169 call OutputSectorCountAndAddress
[150]170
171 ; Output command
172 mov al, [bp+IDEPACK.bCommand]
[267]173 OUTPUT_AL_TO_IDE_REGISTER COMMAND_REGISTER_out
[150]174
175 ; Wait until command completed
[400]176 pop bx ; Pop status and timeout for polling
177 cmp bl, FLG_STATUS_DRQ ; Data transfer started?
178 jne SHORT .WaitUntilNonTransferCommandCompletes
[473]179%ifdef MODULE_8BIT_IDE
180 cmp BYTE [di+DPT_ATA.bDevice], DEVICE_8BIT_XTCF_DMA
[474]181 je SHORT .StartDmaTransfer
[473]182 ja SHORT JrIdeTransfer_StartWithCommandInAL ; DEVICE_8BIT_XTCF_MEMMAP or DEVICE_8BIT_JRIDE_ISA
[474]183 jmp IdeTransfer_StartWithCommandInAL
184.StartDmaTransfer:
185 jmp IdeDmaTransfer_StartWithCommandInAL
186%else
187 jmp IdeTransfer_StartWithCommandInAL
[400]188%endif
189
190.WaitUntilNonTransferCommandCompletes:
191%ifdef MODULE_IRQ
[150]192 test BYTE [bp+IDEPACK.bDeviceControl], FLG_DEVCONTROL_nIEN
[400]193 jz SHORT .PollStatusFlagInsteadOfWaitIrq
194 jmp IdeWait_IRQorStatusFlagInBLwithTimeoutInBH
195.PollStatusFlagInsteadOfWaitIrq:
196%endif
197 jmp IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]198
199.DriveNotReady:
200 pop bx ; Clean stack
201 ret
202
203
204;--------------------------------------------------------------------
205; IdeCommand_SelectDrive
206; Parameters:
207; DS:DI: Ptr to DPT (in RAMVARS segment)
208; SS:BP: Ptr to IDEPACK
209; Returns:
210; AH: INT 13h Error Code
211; CF: Cleared if success, Set if error
212; Corrupts registers:
213; AL, BX, CX, DX
214;--------------------------------------------------------------------
215ALIGN JUMP_ALIGN
[400]216IdeCommand_SelectDrive:
[444]217 ; We use different timeout value when detecting drives.
218 ; This prevents unnecessary long delays when drive is not present.
[473]219 mov cx, TIMEOUT_AND_STATUS_TO_WAIT(TIMEOUT_DRDY, FLG_STATUS_DRDY)
[444]220 cmp WORD [RAMVARS.wDrvDetectSignature], RAMVARS_DRV_DETECT_SIGNATURE
[473]221 eCMOVE ch, TIMEOUT_SELECT_DRIVE_DURING_DRIVE_DETECTION
[408]222
[150]223 ; Select Master or Slave Drive
224 mov al, [bp+IDEPACK.bDrvAndHead]
[267]225 OUTPUT_AL_TO_IDE_REGISTER DRIVE_AND_HEAD_SELECT_REGISTER
[473]226 mov bx, cx
[400]227 call IdeWait_PollStatusFlagInBLwithTimeoutInBH
[150]228
[281]229 ; Ignore errors from IDE Error Register (set by previous command)
[285]230 cmp ah, RET_HD_TIMEOUT
231 je SHORT .FailedToSelectDrive
232 xor ax, ax ; Always success unless timeout
233 ret
234.FailedToSelectDrive:
[281]235 stc
[279]236 ret
[150]237
[279]238
[150]239;--------------------------------------------------------------------
240; OutputSectorCountAndAddress
241; Parameters:
242; AH: LBA low bits (Sector Number)
243; AL: Sector Count
244; CL: LBA middle bits (Cylinder Number low)
245; CH: LBA high bits (Cylinder Number high)
246; DS:DI: Ptr to DPT (in RAMVARS segment)
247; Returns:
248; Nothing
249; Corrupts registers:
250; AL, BX, DX
251;--------------------------------------------------------------------
252ALIGN JUMP_ALIGN
[400]253OutputSectorCountAndAddress:
[267]254 OUTPUT_AL_TO_IDE_REGISTER SECTOR_COUNT_REGISTER
[150]255
256 mov al, ah
[267]257 OUTPUT_AL_TO_IDE_REGISTER LBA_LOW_REGISTER
[150]258
259 mov al, cl
[267]260 OUTPUT_AL_TO_IDE_REGISTER LBA_MIDDLE_REGISTER
[150]261
262 mov al, ch
[473]263 OUTPUT_AL_TO_IDE_REGISTER LBA_HIGH_REGISTER
264 ret
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